Abstract: A pixel array substrate includes a substrate, a plurality of pixel structures, a peripheral trace and a plurality of first patterns. The substrate has an active area and a peripheral area outside the active area. The plurality of pixel structures is disposed in the active area of the substrate. Each of the pixel structures includes a signal line, an active device electrically connected to the signal line and a pixel electrode electrically connected to the active device. The peripheral trace is disposed in the peripheral area of the substrate. A plurality of first patterns is disposed in the peripheral area of the substrate. Each of the first patterns includes a first trunk portion and at least one first branch portion crossed with the first trunk portion. The first trunk portion is electrically connected to the peripheral trace or the signal line of the pixel structure.

Abstract: A pixel array substrate includes a substrate, a plurality of pixel structures, a peripheral trace and a plurality of first patterns. The substrate has an active area and a peripheral area outside the active area. The plurality of pixel structures is disposed in the active area of the substrate. Each of the pixel structures includes a signal line, an active device electrically connected to the signal line and a pixel electrode electrically connected to the active device. The peripheral trace is disposed in the peripheral area of the substrate. A plurality of first patterns is disposed in the peripheral area of the substrate. Each of the first patterns includes a first trunk portion and at least one first branch portion crossed with the first trunk portion. The first trunk portion is electrically connected to the peripheral trace or the signal line of the pixel structure.

Abstract: A display apparatus includes pixels and a gate driver. The pixels include N pixels arranged in order, and N is a positive integer greater than or equal to 2. The N pixels include a pth pixel and a qth pixel, wherein p is an odd number less than or equal to N and a positive integer, and q is an even number less than or equal to N and a positive integer. The gate driver is electrically connected to a scan line of the pth pixel and receives a first start signal to generate a first gate pulse signal in a first sub-frame interval of a frame interval. The gate driver is electrically connected to a scan line of the qth pixel and receives a second start signal to generate a second gate pulse signal in a second sub-frame interval of the frame interval following the first sub-frame interval.

Abstract: A display apparatus includes pixels and a gate driver. The pixels include N pixels arranged in order, and N is a positive integer greater than or equal to 2. The N pixels include a pth pixel and a qth pixel, wherein p is an odd number less than or equal to N and a positive integer, and q is an even number less than or equal to N and a positive integer. The gate driver is electrically connected to a scan line of the pth pixel and receives a first start signal to generate a first gate pulse signal in a first sub-frame interval of a frame interval. The gate driver is electrically connected to a scan line of the qth pixel and receives a second start signal to generate a second gate pulse signal in a second sub-frame interval of the frame interval following the first sub-frame interval.

Abstract: A stereo display including a display panel and a light shieldable element is provided. The display panel has at least two sub-pixel regions. Each sub-pixel region is configured with at least a first pixel electrode to define a first sub-region. The light shieldable element is disposed in front of the sub-pixel regions. Each first pixel electrode has a first shieldable region shielded by the light shieldable element and a first non-shielding region exposed by the light shieldable element. The first shieldable region is closer to the scan line than the first non-shielding region. A horizontal direction is defined as a connection line of two eyes of a user watching the stereo display. A total length A of each sub-pixel region and a length B of the first shieldable region in a predetermined direction intersected to the horizontal direction comply with a relationship that (B/A)×100% is substantially from 1.61% to 47.9%.

Abstract: A displayer and a pixel circuit thereof are provided. The displayer comprises the pixel circuit and a driving circuit for supplying a driving voltage to the pixel circuit. The pixel circuit belongs to a two data lines and one gate line architecture and comprises two pixel electrodes at least. The two pixel electrodes belong to the same pixel type and are positioned adjacent to each other. Thereby, the pixel circuit can improve the color shift effectively.

Abstract: A stereo display including a display panel and a light shieldable element is provided. The display panel has at least two sub-pixel regions. Each sub-pixel region is configured with at least a first pixel electrode to define a first sub-region. The light shieldable element is disposed in front of the sub-pixel regions. Each first pixel electrode has a first shieldable region shielded by the light shieldable element and a first non-shielding region exposed by the light shieldable element. The first shieldable region is closer to the scan line than the first non-shielding region. A horizontal direction is defined as a connection line of two eyes of a user watching the stereo display. A total length A of each sub-pixel region and a length B of the first shieldable region in a predetermined direction intersected to the horizontal direction comply with a relationship that (B/A)×100% is substantially from 1.61% to 47.9%.

Abstract: A liquid crystal display panel including an active device array substrate, an opposite substrate, a plurality of spacers and a liquid crystal layer is provided. The active device array substrate includes a plurality of position limiting structures, each including a first and a second position limiting pattern. The opposite substrate is disposed above the active device array substrate. The spacers are disposed on the opposite substrate, and the spacers are protruded towards the active device array substrate and extended adjacent to the first and second position limiting patterns. Displacement of each spacer is limited by the first or second position limiting pattern. The first position limiting patterns limit the displacement of a portion of the spacers along a first azimuth range, the second position limiting patterns limit the displacement of a portion of the spacers along a second azimuth range, and the first and second azimuth ranges are different.

Abstract: A displayer and a pixel circuit thereof are provided. The displayer comprises the pixel circuit and a driving circuit for supplying a driving voltage to the pixel circuit. The pixel circuit belongs to a two data lines and one gate line architecture and comprises two pixel electrodes at least. The two pixel electrodes belong to the same pixel type and are positioned adjacent to each other. Thereby, the pixel circuit can improve the color shift effectively.

Abstract: A liquid crystal display panel including an active device array substrate, an opposite substrate, a plurality of spacers and a liquid crystal layer is provided. The active device array substrate includes a plurality of position limiting structures, each including a first and a second position limiting pattern. The opposite substrate is disposed above the active device array substrate. The spacers are disposed on the opposite substrate, and the spacers are protruded towards the active device array substrate and extended adjacent to the first and second position limiting patterns. Displacement of each spacer is limited by the first or second position limiting pattern. The first position limiting patterns limit the displacement of a portion of the spacers along a first azimuth range, the second position limiting patterns limit the displacement of a portion of the spacers along a second azimuth range, and the first and second azimuth ranges are different.