Abstract: A method for inspecting short-circuit of circuit layout and a device using the same are provided, the method including: obtaining a circuit layout, wherein the circuit layout including a plurality of components; searching at least one of physical short-circuit components on the circuit layout among the components; adjusting the at least one of the physical short-circuit components so as to set the at least one of the physical short-circuit components to an open circuit state; inspecting whether the circuit layout has a short-circuit; and recovering the at least one of the physical short-circuit components to the at least one of the physical short-circuit components before adjustment. Thus, the short-circuit errors needed to be corrected in the circuit layout are detected exactly.

Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; generating a layout suggestion when the crosstalk value is larger than the predetermined value.

Abstract: One implementation of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing a layout suggestion table when the crosstalk value is larger than the predetermined value.

Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer including: executing a layout program for a layout circuit; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing an interface for showing information of the layout result and adjusting a plurality of lines of the layout circuit.

Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer including: executing a layout program for a layout circuit; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing an interface for showing information of the layout result and adjusting a plurality of lines of the layout circuit.

Abstract: One implementation of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing a layout suggestion table when the crosstalk value is larger than the predetermined value.

Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; generating a layout suggestion when the crosstalk value is larger than the predetermined value.

Abstract: A printed circuit board is disclosed. The printed circuit board includes a solder mask area and at least one chip attachment area. The at least one chip attachment area has an isolation solder mask layer such that the chip attachment area forms a plurality of chip sub-attachment areas to reduce an area of a solder paste smeared on the chip attachment area, and the isolation solder mask layer has at least one hole.

Abstract: A method for inspecting short-circuit of circuit layout and a device using the same are provided, the method including: obtaining a circuit layout, wherein the circuit layout including a plurality of components; searching at least one of physical short-circuit components on the circuit layout among the components; adjusting the at least one of the physical short-circuit components so as to set the at least one of the physical short-circuit components to an open circuit state; inspecting whether the circuit layout has a short-circuit; and recovering the at least one of the physical short-circuit components to the at least one of the physical short-circuit components before adjustment. Thus, the short-circuit errors needed to be corrected in the circuit layout are detected exactly.