Abstract: A display element includes a variable optical element that changes appearance in response to changes in current, and a programmable resistance in series with the variable optical element. The resistance of the programmable resistance decreases in response to a first current in a first direction. The resistance of the programmable resistance increases in response to a second current in a second direction.

Abstract: A method for making magnetic random access memories (MRAM) isolates each and every memory cell in an MRAM array during operation until selected. Some embodiments use series connected diodes for such electrical isolation. Only a selected one of the memory cells will then conduct current between respective ones of the bit and word lines. A better, more uniform distribution of read and data-write data access currents results to all the memory cells. In another embodiment, this improvement is used to increase the number of rows and columns to support a larger data array. In a further embodiment, such improvement is used to increase operating margins and reduce necessary data-write voltages and currents.

Abstract: A magnetic memory element is written to by heating the memory element and applying at least one magnetic field to the memory element.

Abstract: A resistive cross point array memory device comprising a plurality of word lines extending in a row direction, a plurality of bit lines extending in a column direction such that a plurality of cross points is formed at intersections between the word and bit lines, and at least one memory element formed in at least one of the cross points. The memory element comprises a first tunnel junction having a bottom conductor, a top conductor, a barrier layer adjacent the bottom conductor, and wherein the bottom conductor comprises a non-uniform upper surface.

Abstract: A storage device comprising a magnetic storage medium mounted in a first plane, a read and write mechanism mounted in a second plane that is parallel to the first plane and configured to write information to the magnetic storage medium, and a micromover configured to move the magnetic storage medium in a first direction parallel to the first plane and configured to move the magnetic storage medium in a second direction parallel to the first plane and perpendicular to the first direction.

Abstract: Methods and apparatuses are disclosed for retrieving data stored in a magnetic integrated memory. In one embodiment, the method includes applying a perturbing hard-axis magnetic field to a magnetic element in a magnetic integrated memory and detecting a change in an electrical parameter caused by said perturbing hard-axis magnetic field.

Abstract: A memory structure that includes a first electrode, a second electrode, a third electrode, a control element of a predetermined device type disposed between the first electrode and the second electrode, and a memory storage element of the predetermined device type disposed between the second electrode and the third electrode. The memory storage element has a cross-sectional area that is less than a cross-sectional area of the control element.

Abstract: A memory device includes an array of magnetic storage cells. Each magnetic storage cell in the array includes a set of conductors used to write data to a storage cell and a second set of conductors used to heat the magnetic storage cell and read data from the magnetic storage cell. The magnetic storage cells can be used in electronic systems such as a computer system or consumer electronic system.

Abstract: A magneto-resistive device includes first and second ferromagnetic layers having different coercivities, and a spacer layer between the first and second layers. Each ferromagnetic layer has a magnetization that can be oriented in either of two directions.

Abstract: A data storage device is disclosed that has a plurality of word lines, a plurality of bit lines, and a resistive crosspoint array of memory cells. Each memory cell is connected to a bit line and connected to an isolation diode that further connects to a respective word line. The isolation diode provides a unidirectional conductive path from the bit line to the word line. Each word line provides a common metal-semiconductor contact with each diode sharing the word line such that each diode has a separate metal contact located between the semiconductor portion of the common metal-semiconductor contact and its respective memory cell.

Abstract: A data storage device having parallel memory planes is disclosed. Each memory plane includes a first resistive cross point plane of memory cells, a second resistive cross point plane of memory cells, a plurality of conductive word lines shared between the first and second planes of memory cells, a plurality of bit lines, each bit line coupling one or more cells from the first plane to another memory cell in the second plane, and a plurality of unidirectional elements. Further, the one unidirectional element couples a first memory cell from the first plane to a selected word line and a selected bit line in a first conductive direction and a second unidirectional element couples a second cell from the second plane to the selected word line and selected bit line in a second conductive direction. The device further provides for a unidirectional conductive path to form from a memory cell in the first plane to a memory cell in the second plane sharing the same bit line.

Abstract: A data storage device that includes an array of resistive memory cells. The resistive memory cells may include a magnetic tunnel junction (MTJ) and a thin-film diode. The device may include a circuit that is electrically connected to the array and that is also capable of monitoring a signal current flowing through a selected memory cell. Once the signal current has been monitored, the circuit is capable of comparing the signal current to an average reference current in order to determine which of a first resistance state and a second resistance state the selected memory cell is in. Also, a method for operating the data storage device.

Abstract: This invention provides a thermal-assisted switching magnetic memory storage device. In a particular embodiment, a cross-point array of conductive rows and columns is provided with offset tunnel junction magnetic memory cells provided proximate to the intersections between the rows and columns. A looping write conductor is provided close to, but not in electrical contact with each memory cell. The looping write conductor loops across the top and bottom of each memory cell. Each magnetic memory cell provides a magnetic data layer characterized by a material wherein the coercivity is decreased upon an increase in temperature, an intermediate layer, and a reference layer. The magnetic fields provided by the looping write conductor during a write operation are not sufficient to alter the magnetic orientation of an unheated data layer, but may alter the data layer of a memory cell warmed by a bias current tunneling through the memory cell.

Abstract: Methods and apparatuses are disclosed for retrieving data stored in a magnetic integrated memory. In one embodiment, the method comprises: a) applying a perturbing hard-axis magnetic field to a magnetic element in a magnetic integrated memory; and b) detecting a change in an electrical parameter caused by said perturbing hard-axis magnetic field.

Abstract: A method and system for minimizing a leaked current within an array of memory cells as well as a method and system for differentiating a resistive value within a sensed memory cell during a read operation are disclosed. The memory array includes a plurality of bit lines and word lines that are cross-coupled via a plurality of memory cells. Each memory cell is limited in providing a conductive path in a first direction only by way of a unidirectional element. Such unidirectional elements typically comprise of diodes. The apparatus utilizes the diodes to form a current path from the bit line to the word line having passed through the diode and resistive memory cell. Further, a differential sense amplifier is utilized to differentiate the sensed current during a read operation from a reference value after an equipotential value is placed across the array to limit leakage current from developing within adjoining word and bit lines during a sense operation of a given memory cell.

Abstract: A memory cell of a data storage device includes serially-connected first and second magnetoresistive devices. The first magnetoresistive device has first and second resistance states. The second magnetoresistive device has third and fourth resistance states. The four resistance states are detectably different.

Abstract: A memory device having a cross point array of memory cells includes a temperature sensor and a reference memory cell. The temperature sensor senses the temperature of the memory device and data from the temperature sensor and the reference memory cell are used to update write currents used to program the array of memory cells. A method of calibrating the memory device involves detecting a temperature of the memory device, determining whether the temperature of the memory device has changed by a threshold value, and updating write current values if the temperature of the memory device changes by the threshold value. The write current values can be updated by data from the reference memory cell, or from write current values stored in a lookup table.

Abstract: A memory device having a cross point array of memory cells includes a temperature sensor and a reference memory cell. The temperature sensor senses the temperature of the memory device and data from the temperature sensor and the reference memory cell are used to update write currents used to program the array of memory cells. A method of calibrating the memory device involves detecting a temperature of the memory device, determining whether the temperature of the memory device has changed by a threshold value, and updating write current values if the temperature of the memory device changes by the threshold value. The write current values can be updated by data from the reference memory cell, or from write current values stored in a lookup table.

Abstract: A data storage device includes a plurality of shunt elements having controlled current paths connected in series, and a plurality of memory cells having programmable resistance states. Each memory cell is connected across the controlled current path of a corresponding shunt element.

Abstract: A magnetic random access memory (MRAM) device having parallel memory planes is disclosed. Each memory plane includes a first magneto-resistive cross point plane of memory cells, a second magneto-resistive cross point plane of memory cells, a plurality of conductive word lines shared between the first and second planes of memory cells, a first plurality of bit lines, each of the first plurality of bit lines coupling one or more cells from the first plane to at least one other memory cell in the first plane, a second plurality of bit lines, each of the second plurality of bit lines coupling one or more cells from the second plane to at least one other memory cell in the second plane, and a plurality of unidirectional elements.