Abstract: A voltage-regulating device for charge pump is disclosed. The charge pump outputs an output voltage according to the operation of at least one clock signal. The voltage-regulating device includes at least one voltage regulating capacitor and at least inverter. The inverter is for receiving the clock signal and outputting an inverse clock signal accordingly. The voltage regulating capacitor has one terminal coupled to the output voltage and the other terminal coupled to the inverter for receiving the inverse clock signal. The width of a PMOS transistor is different from the width of an NMOS transistor in the inverter.

Abstract: An integrated circuit memory array with an extra column of memory cells and a reference bit line is provided, in which the reference bit line acts as a reference for a shared precharging and clamping control on the bit lines in the array. Clamp transistors are coupled to respective bit lines in the array, and adapted to prevent voltage on the respective bit lines from exceeding a target level. A comparator has an input coupled to the reference bit line and an output coupled to the clamp transistors on the plurality of bit lines. The comparator generates a bias voltage which turns on the clamp transistors at a first bias level when the reference bit line has a voltage below the target level, and a second bias level, which is lower than the first bias level, when the reference bit line has a voltage near the target level.

Abstract: An integrated circuit memory array with an extra column of memory cells and a reference bit line is provided, in which the reference bit line acts as a reference for a shared precharging and clamping control on the bit lines in the array. Clamp transistors are coupled to respective bit lines in the array, and adapted to prevent voltage on the respective bit lines from exceeding a target level. A comparator has an input coupled to the reference bit line and an output coupled to the clamp transistors on the plurality of bit lines. The comparator generates a bias voltage which turns on the clamp transistors at a first bias level when the reference bit line has a voltage below the target level, and a second bias level, which is lower than the first bias level, when the reference bit line has a voltage near the target level.

Abstract: A voltage-regulating device for charge pump is disclosed. The charge pump outputs an output voltage according to the operation of at least one clock signal. The voltage-regulating device includes at least one voltage regulating capacitor and at least inverter. The inverter is for receiving the clock signal and outputting an inverse clock signal accordingly. The voltage regulating capacitor has one terminal coupled to the output voltage and the other terminal coupled to the inverter for receiving the inverse clock signal. The width of a PMOS transistor is different from the width of an NMOS transistor in the inverter.

Abstract: A voltage regulating device for charging pump is disclosed. The charging pump outputs an output voltage according to the operation of clock signals. The voltage regulating device includes a number of voltage regulating capacitors whose one terminal is coupled to the output terminal of the charging pump while the other terminal receives inverse clock signals.