Patents by Inventor Lung-Yuan Wang

Lung-Yuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250140746
    Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic module including a carrier structure, at least one first electronic element disposed on a first side of the carrier structure, at least one second electronic element disposed on a second side of the carrier structure, and a plurality of conductive elements is stacked on a substrate via the plurality of conductive elements and a substrate frame, so as to increase an accommodation space between the electronic module and the substrate, thereby preventing the at least one second electronic element of the electronic module from colliding with the substrate.
    Type: Application
    Filed: May 3, 2024
    Publication date: May 1, 2025
    Inventors: Feng KAO, Lung-Yuan WANG
  • Patent number: 12283560
    Abstract: An electronic package is provided, which stacks an electronic structure as an integrated voltage regulator on an electronic component to facilitate close-range cooperation with the electronic component for electrical transmission.
    Type: Grant
    Filed: January 16, 2024
    Date of Patent: April 22, 2025
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Publication number: 20240421026
    Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element is disposed on a carrier structure, a heat conduction layer is formed on the electronic element, and a heat dissipation member having a recess portion is disposed on the heat conduction layer to cover the electronic element. Therefore, the arrangement of the recess portion can buffer the flow of the heat conduction layer to facilitate the formation of an intermetallic structure with sufficient thickness between the heat dissipation member and the electronic element, and the heat dissipation effect of the electronic element can meet expectations.
    Type: Application
    Filed: August 11, 2023
    Publication date: December 19, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chiu-Ling CHEN, Shuai-Lin LIU, Pin-Jing SU, Yi-Min FU, Lung-Yuan WANG
  • Publication number: 20240379534
    Abstract: An electronic package is provided, in which an electronic structure used as an integrated voltage regulator and a plurality of conductive pillars are embedded in an encapsulating layer to facilitate electrical transmission with electronic components at a close range.
    Type: Application
    Filed: April 1, 2024
    Publication date: November 14, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Patent number: 12114427
    Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: October 8, 2024
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Lung-Yuan Wang, Wen-Liang Lien
  • Patent number: 12009340
    Abstract: An electronic package and a method for fabricating the same are provided. Two packaging modules are stacked on each other. An area that an electronic package occupies a mother board is reduced during a subsequent process of fabricating an electronic product. Therefore, the electronic product has a reduced size.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: June 11, 2024
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Lung-Yuan Wang, Feng Kao, Mao-Hua Yeh
  • Publication number: 20240162140
    Abstract: An electronic package is provided, in which an electronic structure used as an integrated voltage regulator and a plurality of conductive pillars are embedded in an encapsulating layer to facilitate electrical transmission with electronic components at a close range.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Publication number: 20240162180
    Abstract: An electronic package is provided, which stacks an electronic structure as an integrated voltage regulator on an electronic component to facilitate close-range cooperation with the electronic component for electrical transmission.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 16, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Patent number: 11984393
    Abstract: An electronic package is provided, in which an electronic structure used as an integrated voltage regulator and a plurality of conductive pillars are embedded in an encapsulating layer to facilitate electrical transmission with electronic components at a close range.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: May 14, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Patent number: 11973047
    Abstract: An electronic package is provided, which stacks an electronic structure as an integrated voltage regulator on an electronic component to facilitate close-range cooperation with the electronic component for electrical transmission.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: April 30, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Publication number: 20240055402
    Abstract: An electronic package is provided, in which a stacking component and a plurality of conductive pillars are embedded in a packaging layer, and a routing structure is formed on the packaging layer, where the stacking component is formed by stacking a first electronic module and a second electronic module on each other, and a plurality of first conductive vias and a plurality of second conductive vias are served as the electrical connection paths between the first electronic module and the second electronic module, such that the transmission distance of electrical signals between a first electronic element in the first electronic module and a second electronic element in the second electronic module can be reduced.
    Type: Application
    Filed: December 8, 2022
    Publication date: February 15, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Lung-Yuan WANG, Feng KAO, Chiu-Ling CHEN, Hung-Kai WANG
  • Publication number: 20230420391
    Abstract: An electronic package is provided, in which an electronic element that is electrically connected to a plurality of conductive vias and a functional part that has a hollow area are disposed on a photonic die that has the plurality of conductive vias and at least one external connection portion, where a cladding layer covers the electronic element and the functional part, such that the external connection portion is exposed from the hollow area and the cladding layer for an optical fiber to insert into the hollow area and connect to the external connection portion, so as to achieve the purpose of optoelectronic integration.
    Type: Application
    Filed: September 14, 2022
    Publication date: December 28, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Publication number: 20230369229
    Abstract: An electronic package and manufacturing method thereof are provided, in which an electronic module served as a bridge element and a plurality of conductive pillars are embedded in a packaging layer, a routing structure is formed on the packaging layer, and a plurality of electronic elements are disposed on the routing structure, such that the electronic elements electrically bridge the electronic module via the routing structure.
    Type: Application
    Filed: July 6, 2022
    Publication date: November 16, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hsin-Jou Lin, Lung-Yuan Wang, Chih-Nan Lin, Feng Kao, Chiu-Ling Chen
  • Publication number: 20230260886
    Abstract: An electronic package is provided, in which a circuit structure is disposed on the uppermost side of a plurality of stacked organic material substrates for connecting an electronic element, so that a line width/line spacing of a redistribution layer of the circuit structure conforms with a line width/line spacing of the electronic element. Therefore, when the size specification of the electronic element is designed to be miniaturized, the redistribution layer configured in the circuit structure can effectively match the line spacing/line width of the electronic element, so as to meet the requirements of miniaturized packaging.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 17, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Publication number: 20230178451
    Abstract: A method of manufacturing an electronic package is provided, in which a package module including a routing structure is stacked on a carrier structure via a plurality of conductive elements, a heat dissipation member covers a part of a surface of the routing structure, and an electronic module is disposed on another part of the surface of the routing structure, so that the routing structure is formed with at least one heat dissipation pad bonded to the heat dissipation member, such that the heat energy of the electronic module and the package module can be dissipated via the heat dissipation pad and the heat dissipation member.
    Type: Application
    Filed: September 14, 2022
    Publication date: June 8, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hsin-Jou Lin, Lung-Yuan Wang, Feng Kao, Chiu-Ling Chen
  • Publication number: 20220304157
    Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 22, 2022
    Inventors: Lung-Yuan WANG, Wen-Liang Lien
  • Patent number: 11382214
    Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: July 5, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Lung-Yuan Wang, Wen-Liang Lien
  • Publication number: 20220068867
    Abstract: An electronic package is provided, which stacks an electronic structure as an integrated voltage regulator on an electronic component to facilitate close-range cooperation with the electronic component for electrical transmission.
    Type: Application
    Filed: November 24, 2020
    Publication date: March 3, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Publication number: 20220068801
    Abstract: An electronic package is provided, in which an electronic structure used as an integrated voltage regulator and a plurality of conductive pillars are embedded in an encapsulating layer to facilitate electrical transmission with electronic components at a close range.
    Type: Application
    Filed: November 23, 2020
    Publication date: March 3, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Publication number: 20220005786
    Abstract: An electronic package and a method for fabricating the same are provided. Two packaging modules are stacked on each other. An area that an electronic package occupies a mother board is reduced during a subsequent process of fabricating an electronic product. Therefore, the electronic product has a reduced size.
    Type: Application
    Filed: September 22, 2021
    Publication date: January 6, 2022
    Inventors: Lung-Yuan Wang, Feng Kao, Mao-Hua Yeh