Patents by Inventor Luo Zheng

Luo Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12254044
    Abstract: In a video playing method, after receiving the rotation fragment, the terminal decodes the rotation fragment, so that surround playing of a video picture can be implemented, and resolution of a played video picture can be the same as resolution of the video picture in the rotation fragment.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: March 18, 2025
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Luo Zheng
  • Publication number: 20230045876
    Abstract: This application discloses a video playing method, apparatus, and system, and a computer storage medium, which belongs to the field of video processing technologies. In this application, after receiving the rotation fragment, the terminal decodes the rotation fragment, so that surround playing of a video picture can be implemented, and resolution of a played video picture can be the same as resolution of the video picture in the rotation fragment. This application is not limited by a quantity of cameras used for front-end shooting, and is widely applied.
    Type: Application
    Filed: October 31, 2022
    Publication date: February 16, 2023
    Inventor: Luo Zheng
  • Patent number: 6847244
    Abstract: A signal generator generates an output signal with a programmable duty cycle and includes a first buffer which generates in response to an input signal an intermediate signal having a selected edge with a voltage slope selected to vary a length of a selected phase of the output signal. A second buffer having a selected input voltage threshold generates the output signal in response to the intermediate signal.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: January 25, 2005
    Assignee: Cirrus Logic, Inc.
    Inventors: Sanjay Pillay, Khoi Mai, Luo Zheng, Dimitri Pantelakis
  • Publication number: 20040135608
    Abstract: A signal generator generates an output signal with a programmable duty cycle and includes a first buffer which generates in response to an input signal an intermediate signal having a selected edge with a voltage slope selected to vary a length of a selected phase of the output signal. A second buffer having a selected input voltage threshold generates the output signal in response to the intermediate signal.
    Type: Application
    Filed: July 22, 2002
    Publication date: July 15, 2004
    Applicant: Cirrus Logic, Inc.
    Inventors: Sanjay Pillay, Khoi Mai, Luo Zheng, Dimitri Pantelakis