Patents by Inventor Luona Goh Loh Nah

Luona Goh Loh Nah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED CIRCUIT SYSTEM EMPLOYING A MODIFIED ISOLATION STRUCTURE
    Publication number: 20090325359
    Abstract: An integrated circuit system that includes: providing a substrate; forming a trench within the substrate; forming a liner on a sidewall of the trench; and forming a dielectric material at a trench bottom with a dielectric width dimension that exceeds that of a width dimension of the trench.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
    Inventors: Huang Liu, Johnny Widodo, Jeff Shu, Luona Goh Loh Nah, Jack Cheng, Wei Lu, Jingze Tian, Xuesong Rao
  • He treatment to improve low-k adhesion property
    Patent number: 7144828
    Abstract: A method of improving adhesion of low dielectric constant films to other dielectric films is described. A low dielectric constant material layer is deposited on a substrate. The low dielectric constant material layer is treated with helium plasma. An overlying layer is deposited on the low dielectric constant material layer wherein there is good adhesion between the low dielectric constant material layer and the overlying layer.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: December 5, 2006
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Wei Lu, Luona Goh Loh Nah, John Sudijono