Patents by Inventor Luther A. Johnson
Luther A. Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10319161Abstract: A system and method for a keyless physical access control system, including keyless access to locks, is described. An access reader integrates a capacitive touch sensor and an RFID reader; the expected interference in operation of the capacitive touch sensor due to the excitation signal generated by the RFID antenna is avoided by selectively turning the RFID antenna on and off at periodic time intervals. The time intervals are selected to be long enough so that both the capacitive touch sensor and the RFID reader can operate normally during respective time intervals to unlock a lock, but short enough so that a user does not notice any delay in operation.Type: GrantFiled: July 27, 2017Date of Patent: June 11, 2019Assignee: UNIKEY TECHNOLOGIES, INC.Inventors: Thomas Bennett, Roy Luther Johnson, III
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Publication number: 20190035183Abstract: A system and method for a keyless physical access control system, including keyless access to locks, is described. An access reader integrates a capacitive touch sensor and an RFID reader; the expected interference in operation of the capacitive touch sensor due to the excitation signal generated by the RFID antenna is avoided by selectively turning the RFID antenna on and off at periodic time intervals.Type: ApplicationFiled: July 27, 2017Publication date: January 31, 2019Inventors: Thomas Bennett, Roy Luther Johnson, III
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Patent number: 9875138Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: GrantFiled: August 1, 2016Date of Patent: January 23, 2018Assignee: Google LLCInventors: Gavriel State, Nicolas Capens, Luther Johnson
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Publication number: 20170132038Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: ApplicationFiled: August 1, 2016Publication date: May 11, 2017Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Patent number: 9495498Abstract: An apparatus, program product and method facilitate the design of a multi-layer circuit arrangement incorporating a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.Type: GrantFiled: September 14, 2012Date of Patent: November 15, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
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Patent number: 9477452Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: GrantFiled: February 25, 2015Date of Patent: October 25, 2016Assignee: Google Inc.Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Patent number: 9436451Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: GrantFiled: November 13, 2015Date of Patent: September 6, 2016Assignee: GOOGLE INC.Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Patent number: 9430202Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: GrantFiled: November 13, 2015Date of Patent: August 30, 2016Assignee: GOOGLE INC.Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Publication number: 20160071305Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: ApplicationFiled: November 13, 2015Publication date: March 10, 2016Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Publication number: 20160070552Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: ApplicationFiled: November 13, 2015Publication date: March 10, 2016Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Publication number: 20150169305Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: ApplicationFiled: February 25, 2015Publication date: June 18, 2015Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Patent number: 9019283Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: GrantFiled: August 29, 2012Date of Patent: April 28, 2015Assignee: Transgaming Inc.Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Patent number: 8736068Abstract: A circuit arrangement and method utilize hybrid bonding techniques that combine wafer-wafer bonding processes with chip-chip and/or chip-wafer bonding processes to form a multi-layer semiconductor stack, e.g., by bonding together one or more sub-assemblies formed by wafer-wafer bonding together with other sub-assemblies and/or chips using chip-chip and/or chip-wafer bonding processes. By doing so, the advantages of wafer-wafer bonding techniques, such as higher interconnect densities, may be leveraged with the advantages of chip-chip and chip-wafer bonding techniques, such as mixing and matching chips with different sizes, aspect ratios, and functions.Type: GrantFiled: March 16, 2012Date of Patent: May 27, 2014Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel
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Patent number: 8445918Abstract: A circuit arrangement and method in one aspect utilize thermal-only through vias, extending between the opposing faces of stacked semiconductor dies, to increase the thermal conductivity of a multi-layer semiconductor stack. The thermal vias are provided in addition to data-carrying through vias, which communicate data signals between circuit layers, and power-carrying through vias, which are coupled to a power distribution network for the circuit layers, such that the thermal conductivity is increased above that which may be provided by the data-carrying and power-carrying through vias in the stack. A circuit arrangement and method in another aspect organize the circuit layers in a multi-layer semiconductor stack based upon current density so as to reduce power distribution losses in the stack.Type: GrantFiled: August 13, 2010Date of Patent: May 21, 2013Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel
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Publication number: 20130009324Abstract: An apparatus, program product and method facilitate the design of a multi-layer circuit arrangement incorporating a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: International Business Machines CorporationInventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
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Publication number: 20130011968Abstract: A circuit arrangement and method utilize hybrid bonding techniques that combine wafer-wafer bonding processes with chip-chip and/or chip-wafer bonding processes to form a multi-layer semiconductor stack, e.g., by bonding together one or more sub-assemblies formed by wafer-wafer bonding together with other sub-assemblies and/or chips using chip-chip and/or chip-wafer bonding processes. By doing so, the advantages of wafer-wafer bonding techniques, such as higher interconnect densities, may be leveraged with the advantages of chip-chip and chip-wafer bonding techniques, such as mixing and matching chips with different sizes, aspect ratios, and functions.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel
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Publication number: 20120320051Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: ApplicationFiled: August 29, 2012Publication date: December 20, 2012Applicant: TRANSGAMING TECHNOLOGIES INC.Inventors: Gavriel State, Nicolas Capens, Luther Johnson
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Patent number: 8330489Abstract: A circuit arrangement and method utilize a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.Type: GrantFiled: April 28, 2009Date of Patent: December 11, 2012Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
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Patent number: 8293578Abstract: A circuit arrangement and method utilize hybrid bonding techniques that combine wafer-wafer bonding processes with chip-chip and/or chip-wafer bonding processes to form a multi-layer semiconductor stack, e.g., by bonding together one or more sub-assemblies formed by wafer-wafer bonding together with other sub-assemblies and/or chips using chip-chip and/or chip-wafer bonding processes. By doing so, the advantages of wafer-wafer bonding techniques, such as higher interconnect densities, may be leveraged with the advantages of chip-chip and chip-wafer bonding techniques, such as mixing and matching chips with different sizes, aspect ratios, and functions.Type: GrantFiled: October 26, 2010Date of Patent: October 23, 2012Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel
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Patent number: 8284206Abstract: A software engine for decomposing work to be done into tasks, and distributing the tasks to multiple, independent CPUs for execution is described. The engine utilizes dynamic code generation, with run-time specialization of variables, to achieve high performance. Problems are decomposed according to methods that enhance parallel CPU operation, and provide better opportunities for specialization and optimization of dynamically generated code. A specific application of this engine, a software three dimensional (3D) graphical image renderer, is described.Type: GrantFiled: March 14, 2007Date of Patent: October 9, 2012Assignee: Transgaming, Inc.Inventors: Gavriel State, Nicolas Capens, Luther Johnson