Abstract: Embodiments provide a method for processing an optoelectronic device, wherein the method includes providing a functional semiconductor layer stack with a conductive layer and hard mask layer located on the conductive layer. Both hard mask and conductive layer are structured, and a protective layer is arranged on sidewalls of the conductive layer. Then two dry etching and a wet etching process are performed to obtain an optoelectronic device. Portions of the hard mask layer on the conductive layer remain on the functional layer stack and form an integral part of the device.

Abstract: In embodiments a method includes providing a functional semiconductor layer stack and depositing a first material on the surface, in particular a transition element oxide. A structured hard mask stack is deposited on the first material, wherein the structured hard mask stack includes a first layer and at least a second layer on the first layer with sidewalls of at least the first layer covered by a second material, wherein the second layer and the second material are resilient against a wet chemical etching process. Two anisotropic dry chemical etching processes and a wet etching process is performed to provide a deep mesa structure in the functional layer stack, wherein the second layer protects the first layer during the wet etching process.

Abstract: The invention relates to a surface-emitting semiconductor laser, including a first semiconductor layer of a first conductivity type, the first semiconductor layer being structured forming a mesa, an active zone for generating electromagnetic radiation and a second semiconductor layer of a second conductivity type. The first semiconductor layer, the active zone and the second semiconductor layer are arranged on top of one another forming a semiconductor layer stack. The surface-emitting semiconductor laser further comprises a sheath layer which adjoins a lateral wall of the mesa.

Abstract: An optoelectronic semiconductor device may include a carrier having a roughened first main surface and optoelectronic semiconductor chips arranged over the roughened first main surface. The combined surface area of the optoelectronic semiconductor chips is smaller than the surface area of the carrier, and a part of the roughened first main surface is arranged between adjacent optoelectronic semiconductor chips.

Abstract: An optoelectronic semiconductor device may include a carrier comprising a patterned surface and a semiconductor layer sequence arranged on the carrier. The semiconductor layer sequence may include a first semiconductor layer having a first surface, a second semiconductor layer having a first surface, and a first main surface and a second main surface opposite the first main surface. The first surfaces of the first and second semiconductor layers may be at least partly arranged at the first main surface. The second main surface may face the patterned surface of the carrier, and at least one side face may connect the first and second main surfaces. The device may further include a directionally reflective layer and a planarization layer. The planarization layer may be arranged between the patterned surface and the directionally reflective layer. Moreover, a method for producing an optoelectronic semiconductor device is also disclosed.

Abstract: In an embodiment a composite semiconductor component includes a carrier substrate having a plurality of projecting elements projecting from a first main surface of the carrier substrate, an electrically conductive material electrically conductively connected to a contact region of the carrier substrate and located on at least one of the projecting elements, some of the projecting elements not being covered with the electrically conductive material and a semiconductor chip arranged on the carrier substrate and having at a first surface at least one contact pad electrically connected to the electrically conductive material on at least one element, wherein, at a position at which the contact pad and the electrically conductive material on the projecting element are in each case in contact with one another, the contact pad has a larger lateral extent than the projecting element in each case.

Abstract: An optoelectronic semiconductor device may include a carrier having a roughened first main surface and optoelectronic semiconductor chips arranged over the roughened first main surface. The combined surface area of the optoelectronic semiconductor chips is smaller than the surface area of the carrier, and a part of the roughened first main surface is arranged between adjacent optoelectronic semiconductor chips.

Abstract: A component may have a semiconductor body, a first electrode, and a second electrode. The first electrode and the second electrode may be configured for electrically contacting a first semiconductor layer and a second semiconductor, respectively, and may have a first distribution track and a second distribution track for uniformly distributing current in the first semiconductor layer and the second semiconductor layer, respectively. The first distribution track and the second distribution track may be arranged regionally one above the other on the same side of the semiconductor body, overlap each other regionally in top view, and cover the semiconductor body only in certain places. Furthermore, the first distribution track may extend in places throughout the second semiconductor layer and the active zone to the first semiconductor layer. The active zone may be removed only in places in overlapping regions of the semiconductor body and the first distribution track.

Abstract: In an embodiment, a multi-chip module includes a first carrier including a mold material and at least two light-emitting diode chips embedded at least by side faces in the first carrier, wherein the light-emitting diode chips have first electrical contacts on a front side and second electrical contacts on a rear side, wherein the front side is configured as a radiation side, wherein the first electrical contacts are connected to control lines, wherein the control lines are arranged on a front side of the first carrier, wherein the second electrical contacts are connected to a collective line, and wherein the collective line is led to a rear side of the first carrier.

Abstract: In an embodiment a composite semiconductor component includes a carrier substrate having a plurality of projecting elements projecting from a first main surface of the carrier substrate, an electrically conductive material electrically conductively connected to a contact region of the carrier substrate and located on at least one of the projecting elements, some of the projecting elements not being covered with the electrically conductive material and a semiconductor chip arranged on the carrier substrate and having at a first surface at least one contact pad electrically connected to the electrically conductive material on at least one element, wherein, at a position at which the contact pad and the electrically conductive material on the projecting element are in each case in contact with one another, the contact pad has a larger lateral extent than the projecting element in each case.

Abstract: A mount (10) and an optoelectronic component (100) with the mount (10) are provided, wherein the mount (10) comprises a moulding (5), at least one through-contact (41, 42) and a plurality of reinforcing fibres (52), wherein the moulding (5) is formed from an electrically insulating moulding material (53), the through-contact (41, 42) is formed from an electrically conductive material, and the reinforcing fibres (52) produce a mechanical connection between the moulding (5) and the through-contact (41, 42) by the reinforcing fibres (52) being arranged in certain regions of the moulding (5) and arranged in certain regions of the through-contact (41, 42). A method for producing a mount or a component with such a mount is also provided.

Abstract: A method for producing a component may include providing a composite including a semiconductor layer stack, a first connection layer and a second connection layer, wherein the first and second connection layers are arranged on the semiconductor layer stack, are assigned to different electrical polarities and are configured for the electrical contacting of the component to be produced, applying a molded body material on the composite for forming a molded body, such that in a plan view of the semiconductor layer stack the molded body covers the first connection layer and the second connection layer, forming a first cutout and a second cutout through the molded body for exposing the connection layers in places, and filling the first and second cutouts with an electrically conductive material for forming through contacts which are electrically conductively connected to the connection layers and extend through the molded body in the vertical direction.

Abstract: The invention relates, inter alia, to a method for producing a plurality of semiconductor chips, the method comprising the following steps: providing a substrate (1); applying a semiconductor layer sequence (2) to the substrate (1); generating a plurality of recesses (6) in the semiconductor layer sequence (2) on the side of the semiconductor layer sequence (2) that is facing away from the substrate (1); detaching the substrate (1) from the semiconductor layer sequence (2); thinning the semiconductor layer sequence (2) on the side that was facing the substrate (1) prior to detaching the substrate (1).

Abstract: A method for producing a component may include providing a composite containing a semiconductor stack layer, a first exposed connection layer and a second exposed connection layer, where the connection layers are arranged on the semiconductor stack, assigned to different electrical polarities and are configured to electrically contact the component to be produced; forming a first through contact exposed in lateral directions on the first connection layer and a second through contact exposed in lateral directions on the second connection layer, where the through contacts are formed from an electrically conductive connection material; and applying a molded body material on the composite for forming a molded body, where each of the through contacts are fully and circumferentially enclosed by the molded body at least in the lateral directions, such that the molded body and the through contacts form a permanently continuous carrier which mechanically carries the component to be produced.

Abstract: Disclosed is a method for producing a plurality of semiconductor chips (10). A composite (1), which comprises a carrier (4) and a semiconductor layer sequence (2, 3), is provided. Separating trenches (17) are formed in the semiconductor layer sequence (2, 3) along an isolation pattern (16). A filling layer (11) limiting the semiconductor layer sequence (2, 3) toward the separating trenches (17) is applied to a side of the semiconductor layer sequence (2, 3) facing away from the carrier (4). Furthermore, a metal layer (10) adjacent to the filling layer (11) is applied in the separating trenches (17). The semiconductor chips (20) are isolated by removing the metal layer (10) adjacent to the filling layer (11) in the separating trenches (17). Each isolated semiconductor chip (20) has one part of the semiconductor layer sequence (2, 3), and of the filling layer (11). Also disclosed is a semiconductor chip (10).

Abstract: Disclosed is an optoelectronic semiconductor chip (10) comprising: —a succession of semiconductor layers (1) that has a main plane of extension, an active layer (12) and a bottom surface (1c); —a substrate (41) that is arranged on the bottom surface (1c) of the succession of semiconductor layers (1) and has a base surface (41c) facing away from the bottom surface (1c); and —a succession of joining layers (3) which is arranged in at least some locations between the succession of semiconductor layers (1) and the substrate (41) in a vertical direction; wherein —the substrate (41) laterally protrudes from the succession of semiconductor layers (1) by a maximum of 10 ?m.

Abstract: A multi-chip module is disclosed. In an embodiment, a multi-chip module includes a first carrier including a mold material and at least two light-emitting diode chips embedded at least by side faces in the first carrier, wherein the light-emitting diode chips have first electrical contacts on a front side and second electrical contacts on a rear side, wherein the front side is configured as a radiation side, wherein the first electrical contacts are connected to control lines, wherein the control lines are arranged on a front side of the first carrier, wherein the second electrical contacts are connected to a collective line, and wherein the collective line is led to a rear side of the first carrier.

Abstract: A component with a semiconductor body, a first metal layer and a second metal layer is disclosed. The first metal layer is arranged between the semiconductor body and the second metal layer. The semiconductor body has a first semiconductor layer, a second semiconductor layer, and an active layer. The component has a plated-through hole, which extends through the second semiconductor layer and the active layer for the electrical contacting of the first semiconductor layer. The second metal layer has a first subregion, and a second subregion, spaced apart laterally from the first subregion by an intermediate space. The first subregion is electrically connected to the plated-through hole and is assigned to a first electrical polarity of the component. In plan view, the first metal layer laterally completely bridges the intermediate space and is assigned to a second electrical polarity of the component which differs from the first electrical polarity.

Abstract: A method for producing a plurality of optoelectronic semiconductor components (100) is provided, comprising the following steps: a) providing an auxiliary carrier (2); b) providing a plurality of semiconductor chips (10), wherein each of the semiconductor chips has a carrier body (12) and a semiconductor body (4) arranged on an upper side (22) of the carrier body; c) attaching the plurality of semiconductor chips on the auxiliary carrier, wherein the semiconductor chips are spaced apart from one another in a lateral direction (L) and wherein the semiconductor bodies are facing the auxiliary carrier, as seen from the carrier body; d) forming a scattering layer (18), at least in regions between the semiconductor bodies of adjacent semiconductor chips; e) forming a composite package (20); f) removing the auxiliary carrier (2); and g) individually separating the composite package into a plurality of optoelectronic semiconductor components (100).

Abstract: A component includes a semiconductor body, a carrier, and a stabilization layer arranged between the semiconductor body and the carrier in the vertical direction. The semiconductor body has a first semiconductor layer facing away from the carrier, a second semiconductor layer facing the carrier, and an active layer arranged between the first semiconductor layer and the second semiconductor layer. The carrier has a first via and a second via laterally spaced apart from the first via by means of an intermediate region. The first via is connected to the first semiconductor layer in an electrically conductive manner and the second via is connected to the second semiconductor layer in an electrically conductive manner. The stabilization layer is continuous, overlaps with the vias in a top view, and laterally bridges the intermediate region. The stabilization layer is electrically insulated from the vias and from the semiconductor body.