Abstract: An operational amplifier-based hysteresis comparator and a chip are provided. The hysteresis comparator includes: an input stage and an amplification stage. The input stage includes: a first input branch and a second input branch, where the first input branch generates a first current based on the first voltage, and the second input branch generates a second current based on the second voltage. The first current is connected with a first input terminal of the amplification stage, and the second current is connected with a second input terminal of the amplification stage. An output terminal of the amplification stage outputs a first level when the first current is greater than the second current, and outputs a second level when the first current is less than the second current. The present disclosure changes the hysteresis voltage generation mode, thereby reducing the instability caused by positive feedback.

Abstract: A data interface is disclosed, which includes an electrostatic discharge circuit, and a charge transmitting circuit connected to a binding wire through the electrostatic discharge circuit; the charge transmitting circuit includes a first capacitor, the charge transmitting circuit transfers charges in the first capacitor to a parasitic capacitor of the electrostatic discharge circuit and a parasitic capacitor of the binding wire, to generate a first voltage signal and output the first voltage signal through the binding wire. According to the data interface, charges in a charging capacitor and a parasitic capacitor are redistributed, which could not only reduce a power consumption loss caused by a parasitic capacitor in a communication channel but also effectively reduce time delay. In addition, the use of dual-wire communication is avoided by using single-wire communication, and the manufacturing costs are reduced relative to low-voltage differential signaling (LVDS).

Abstract: A data interface is disclosed, which includes an electrostatic discharge circuit, and a charge transmitting circuit connected to a binding wire through the electrostatic discharge circuit; the charge transmitting circuit includes a first capacitor, the charge transmitting circuit transfers charges in the first capacitor to a parasitic capacitor of the electrostatic discharge circuit and a parasitic capacitor of the binding wire, to generate a first voltage signal and output the first voltage signal through the binding wire. According to the data interface, charges in a charging capacitor and a parasitic capacitor are redistributed, which could not only reduce a power consumption loss caused by a parasitic capacitor in a communication channel but also effectively reduce time delay. In addition, the use of dual-wire communication is avoided by using single-wire communication, and the manufacturing costs are reduced relative to low-voltage differential signaling (LVDS).