Abstract: Disclosed is a super-junction device, comprising a semiconductor substrate and a super-junction structure on a first surface of the semiconductor substrate. The super-junction structure includes first semiconductor pillars and second semiconductor pillars. The super-junction device has a cell region and a terminal region surrounding the cell region, the super-junction structure has a portion located in the cell region, and another portion located in the terminal region. The super-junction device further includes a guard ring located in the terminal region and surrounding the cell region, the guard ring includes doped regions extending segmentally and top-end portions of a first set of semiconductor pillars connecting the doped regions into a continuous ring. The top-end portions of the first set of semiconductor pillars in the guard ring are undoped, thus improving impurity distribution of the guard ring, charge balance in the terminal region, and voltage withstand performance of the super-junction device.

Abstract: A super-junction VDMOS device with a low on-resistance includes: a super-junction structure disposed on a drain region; a super-junction structure having a first semiconductor pillar and a second semiconductor pillar. A HEMT structure having heterojunctions is formed between the first semiconductor pillar and the second semiconductor pillar. The HEMT structure includes a first semiconductor material pillar and a second semiconductor material pillar. Heterojunctions are formed in the super-junction structure to form the HEMT structure, inducing two-dimensional electronic gas to facilitate electrical conduction, such that the on-resistance of the VDMOS device is significantly reduced. The voltage difference between the first semiconductor pillar and the second semiconductor pillar in the super-junction structure is utilized to control a cutting-off behavior of the HEMT structure.

Abstract: A super-junction semiconductor device with an enlarged process window for a desirable breakdown voltage includes: a semiconductor substrate and an epitaxial layer deposited on the semiconductor substrate. The epitaxial layer includes a first semiconductor layer, and a second semiconductor layer disposed on the first semiconductor layer. A band gap of the first semiconductor layer is greater than a band gap of the second semiconductor layer. A super-junction structure is formed in the epitaxial layer, including at least one first epitaxial pillar of a first dopant type, and at least one second epitaxial pillar of a second dopant type. The first epitaxial pillar and the second epitaxial pillar are alternately arranged along a transverse direction. The epitaxial layer has a sandwich structure.