Patents by Inventor Lyle Jackson

Lyle Jackson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240301048
    Abstract: Disclosed are compositions and methods related to anti-IL-17A antibodies and antigen binding fragments thereof. Additionally provided are bi-specific binding proteins comprising the anti-IL-17A binding domains. Additionally provided are methods of use for the compounds and compositions described herein in the treatment of inflammatory diseases and ocular disorders.
    Type: Application
    Filed: January 10, 2022
    Publication date: September 12, 2024
    Inventors: Daniel WHITE, Richard A. SHIMKETS, Crystal Lyles JACKSON, Thomas VINCENT, Yonghua LUO
  • Patent number: 11492397
    Abstract: Disclosed are compositions and methods related to IL-25 binding molecules.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: November 8, 2022
    Assignee: ABEOME CORPORATION
    Inventors: Richard A. Shimkets, Crystal Lyles Jackson, Nathan Bartlett, Thomas Vincent, Yonghua Luo
  • Publication number: 20200291105
    Abstract: Disclosed are compositions and methods related to IL-25 binding molecules.
    Type: Application
    Filed: March 9, 2017
    Publication date: September 17, 2020
    Inventors: Richard A. Shimkets, Crystal Lyles Jackson, Nathan Bartlett, Thomas Vincent, Yonghua Luo
  • Patent number: 10372851
    Abstract: A design and timing model for at least one circuit path of at least a portion of an IC design is loaded into a computer. At least one canonical clock variable associated with the model is defined; it includes at least one source of variation. The computer is used to perform an SSTA of the at least one circuit path, based on the design and timing model and the at least one canonical clock variable, to obtain slack canonical data. A clock period is projected, based on the slack canonical data, such that a cycle time canonical is projected to a different space than a logic canonical. Results of the SSTA and the projected clock period are output to determine performance compliance. Efficient operation of the computer is enhanced by analyzing a slack vector in a single timing run, loaded once, and multithreading timing propagation.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: August 6, 2019
    Assignee: International Business Machines Corporation
    Inventors: Nathan Buck, Sean M. Carey, Peter C. Elmendorf, Eric A. Foreman, Jeffrey G. Hemmett, Lyle Jackson, Kerim Kalafala, Stephen G. Shuma, Michael H. Wood
  • Publication number: 20180330032
    Abstract: A design and timing model for at least one circuit path of at least a portion of an IC design is loaded into a computer. At least one canonical clock variable associated with the model is defined; it includes at least one source of variation. The computer is used to perform an SSTA of the at least one circuit path, based on the design and timing model and the at least one canonical clock variable, to obtain slack canonical data. A clock period is projected, based on the slack canonical data, such that a cycle time canonical is projected to a different space than a logic canonical. Results of the SSTA and the projected clock period are output to determine performance compliance. Efficient operation of the computer is enhanced by analyzing a slack vector in a single timing run, loaded once, and multithreading timing propagation.
    Type: Application
    Filed: May 11, 2017
    Publication date: November 15, 2018
    Inventors: Nathan Buck, Sean M. Carey, Peter C. Elmendorf, Eric A. Foreman, Jeffrey G. Hemmett, Lyle Jackson, Kerim Kalafala, Stephen G. Shuma, Michael H. Wood