Patents by Inventor Lynn Lee

Lynn Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250254898
    Abstract: The present invention relates to a semiconductor device having a capacitor and a method for fabricating the same. A semiconductor device may comprise: a lower electrode; a supporter supporting an outer wall of the lower electrode; a dielectric layer formed over the lower electrode and the supporter; an upper electrode formed on the dielectric layer; and a dielectric booster layer disposed between the lower electrode and the dielectric layer, and selectively formed on a surface of the lower electrode.
    Type: Application
    Filed: April 24, 2025
    Publication date: August 7, 2025
    Inventors: Lynn LEE, Wan Joo MAENG, Jae Hee SONG, Ki Vin IM
  • Patent number: 12317520
    Abstract: The present invention relates to a semiconductor device having a capacitor and a method for fabricating the same. A semiconductor device may comprise: a lower electrode; a supporter supporting an outer wall of the lower electrode; a dielectric layer formed over the lower electrode and the supporter; an upper electrode formed on the dielectric layer; and a dielectric booster layer disposed between the lower electrode and the dielectric layer, and selectively formed on a surface of the lower electrode.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: May 27, 2025
    Assignee: SK hynix Inc.
    Inventors: Lynn Lee, Wan Joo Maeng, Jae Hee Song, Ki Vin Im
  • Publication number: 20240224511
    Abstract: A semiconductor device includes: a vertical conductive line; a horizontal layer oriented horizontally from the vertical conductive line; a horizontal conductive line crossing the horizontal layer; and a data storage element in contact with the horizontal layer, wherein the data storage element includes: a first electrode including a first cylinder that is in contact with an edge of an upper portion of the horizontal layer and a second cylinder that is in contact with an edge of a lower portion of the horizontal layer; a second electrode disposed over the first electrode; and a dielectric layer between the first electrode and the second electrode, and the second electrode includes: a sharing portion disposed in a gap between the first cylinder and the second cylinder; inner portions disposed on an inner surface of the first cylinder and an inner surface of the second cylinder; and outer portions disposed over the first cylinder and below the second cylinder.
    Type: Application
    Filed: May 26, 2023
    Publication date: July 4, 2024
    Inventors: Il Do KIM, Lynn LEE, Seung Bum KIM
  • Patent number: 11948795
    Abstract: Provided are a method for manufacturing a single-crystal semiconductor layer. The method of manufacturing the single crystalline semiconductor layer includes performing a unit cycle multiple times, wherein the unit cycle includes a metal precursor pressurized dosing operation in which a metal precursor is adsorbed on a surface of a single crystalline substrate by supplying the metal precursor onto the single crystalline substrate while an outlet of a chamber in which the single crystalline substrate is loaded is closed such that a reaction pressure in the chamber is increased; a metal precursor purge operation; a reactive gas supplying operation in which a reactive gas is supplied into the chamber to cause a reaction of the reactive gas with the metal precursor adsorbed on the single crystalline substrate after the metal precursor purge operation; and a reactive gas purge operation.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: April 2, 2024
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo Sung, Lynn Lee, Jin Won Jung, Jong Chan Kim
  • Publication number: 20220399435
    Abstract: The present invention relates to a semiconductor device having a capacitor and a method for fabricating the same. A semiconductor device may comprise: a lower electrode; a supporter supporting an outer wall of the lower electrode; a dielectric layer formed over the lower electrode and the supporter; an upper electrode formed on the dielectric layer; and a dielectric booster layer disposed between the lower electrode and the dielectric layer, and selectively formed on a surface of the lower electrode.
    Type: Application
    Filed: February 4, 2022
    Publication date: December 15, 2022
    Inventors: Lynn LEE, Wan Joo MAENG, Jae Hee SONG, Ki Vin IM
  • Publication number: 20210242012
    Abstract: Provided are a method for manufacturing a single-crystal semiconductor layer. The method of manufacturing the single crystalline semiconductor layer includes performing a unit cycle multiple times, wherein the unit cycle includes a metal precursor pressurized dosing operation in which a metal precursor is adsorbed on a surface of a single crystalline substrate by supplying the metal precursor onto the single crystalline substrate while an outlet of a chamber in which the single crystalline substrate is loaded is closed such that a reaction pressure in the chamber is increased; a metal precursor purge operation; a reactive gas supplying operation in which a reactive gas is supplied into the chamber to cause a reaction of the reactive gas with the metal precursor adsorbed on the single crystalline substrate after the metal precursor purge operation; and a reactive gas purge operation.
    Type: Application
    Filed: December 9, 2019
    Publication date: August 5, 2021
    Applicant: IUCF-HYU (Industry-University Cooperation Foundation HanyAng University)
    Inventors: Myung Mo SUNG, Lynn LEE, Jin Won JUNG, Jong Chan KIM
  • Patent number: 10886502
    Abstract: A barrier according to an embodiment of the present invention is provided. The barrier includes a polymer configured of a plurality of first atoms; and an inorganic material configured of a plurality of second atoms and coexisting with the organic material, wherein an atomic planar density defined by the number of atoms per cm2 of the first atoms and the second atoms exceeds 1.9×1017 atoms/cm2.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: January 5, 2021
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo Sung, Lynn Lee, Hong Ro Yoon
  • Publication number: 20200106043
    Abstract: A barrier according to an embodiment of the present invention is provided. The barrier includes a polymer configured of a plurality of first atoms; and an inorganic material configured of a plurality of second atoms and coexisting with the organic material, wherein an atomic planar density defined by the number of atoms per cm2 of the first atoms and the second atoms exceeds 1.9×1017 atoms/cm2.
    Type: Application
    Filed: December 18, 2018
    Publication date: April 2, 2020
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo SUNG, Lynn LEE, Hong Ro YOON
  • Patent number: 10501864
    Abstract: A method for manufacturing a perovskite crystal structure includes preparing a substrate, disposing a stamp having a roll shape on the substrate, injecting a perovskite precursor solution between the substrate and the stamp, and drying the precursor solution to manufacture a perovskite crystal structure. The stamp rolls in a first direction on the substrate, and the precursor solution is continuously crystallized in the first direction between the substrate and the stamp to manufacture the perovskite crystal structure.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: December 10, 2019
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo Sung, Jang Mi Baek, Lynn Lee
  • Publication number: 20180216249
    Abstract: A method for manufacturing a perovskite crystal structure includes preparing a substrate, disposing a stamp having a roll shape on the substrate, injecting a perovskite precursor solution between the substrate and the stamp, and drying the precursor solution to manufacture a perovskite crystal structure. The stamp rolls in a first direction on the substrate, and the precursor solution is continuously crystallized in the first direction between the substrate and the stamp to manufacture the perovskite crystal structure.
    Type: Application
    Filed: March 23, 2018
    Publication date: August 2, 2018
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo SUNG, Jang Mi BAEK, Lynn LEE
  • Patent number: 8428993
    Abstract: Method and apparatus for shift work scheduling based upon an optimization of analyzing and managing fatigue primarily in but not limited to aviation occupations. The invention matches workers to shifts in a manner that minimizes fatigue while on shift and maximizes shift worker effectiveness. The invention is adaptable to other occupations where assuring shift work crew rest is critical. Graphical user interfaces (GUIs) allow for the insertion of sleep into crew shift work schedules. Alternative sleep models are used for different modes of sleep. The invention produces as an output an optimized shift work/sleep schedules with an associated effectiveness determination.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: April 23, 2013
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Lynn Lee
  • Publication number: 20120065893
    Abstract: Method and apparatus for analyzing and managing fatigue primarily in but not limited to aviation occupations. The invention is adaptable to other occupations where assuring crew rest is critical. Graphical user interfaces (GUIs) allow for the insertion of sleep quantity, quality, and sleep interruptions over a number of days. The invention produces as an output the user's cognitive effectiveness ranging from high levels to critically low levels over a period of days.
    Type: Application
    Filed: February 24, 2011
    Publication date: March 15, 2012
    Inventor: Lynn Lee
  • Publication number: 20120029971
    Abstract: Method and apparatus for shift work scheduling based upon an optimization of analyzing and managing fatigue primarily in but not limited to aviation occupations. The invention matches workers to shifts in a manner that minimizes fatigue while on shift and maximizes shift worker effectiveness. The invention is adaptable to other occupations where assuring shift work crew rest is critical. Graphical user interfaces (GUIs) allow for the insertion of sleep into crew shift work schedules. Alternative sleep models are used for different modes of sleep. The invention produces as an output an optimized shift work/sleep schedules with an associated effectiveness determination.
    Type: Application
    Filed: September 29, 2011
    Publication date: February 2, 2012
    Inventor: Lynn Lee
  • Publication number: 20110071873
    Abstract: Apparatus and method for analyzing and managing fatigue primarily in aviation occupations. The invention is adaptable to other occupations where assuring crew rest is critical. Air crew specific graphical user interfaces (GUIs) allow for the insertion of sleep into crew work schedules. Alternative sleep models are used for different modes of sleep. The invention produces as an output work/sleep schedules with an associated effectiveness determination.
    Type: Application
    Filed: July 30, 2010
    Publication date: March 24, 2011
    Inventors: Edward Vaughan, Lynn Lee
  • Patent number: 7581992
    Abstract: Systems and methods are disclosed herein to provide improved techniques for connecting an electrical device to an external power source. For example, in accordance with an embodiment of the present invention, an electrical device is disclosed having various types of connections to a power source. The connections may also provide power transformation.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: September 1, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Calvin Y. Liu, Lynn Lee, Frank Hung