Patents by Inventor Lynn W. D'Amico

Lynn W. D'Amico has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7844554
    Abstract: A system and method to remotely enable and disable features in a mailing system is provided. When a customer desires to change the operating features of a mailing system, the customer places an order with a data center. The data center generates a file that identifies each of the features that should be enabled within the mailing system, and the file is sent to the mailing system, along with any files required to implement and support the enabled features, via a network. The mailing system will store the required files, and purge any files no longer required to implement and support features that are no longer enabled. The enabling and disabling of operating features is thus performed remotely from the data center, and does not require a customer service representative to physically visit the location at which the mailing system is installed.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: November 30, 2010
    Assignee: Pitney Bowes Inc.
    Inventors: Robert H. Kummer, Jr., Linda S. Lin, Lynn W. D'Amico, Wesley A. Kirschner
  • Patent number: 7769700
    Abstract: A method and a system for collecting, segregating, and transmitting data relating to the use of a value metering system are described. A system and a method for dynamically updating collection, segregation, and/or transmission rules are also described.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: August 3, 2010
    Assignee: Pitney Bowes Inc.
    Inventors: Lynn W. D'Amico, Derak DaGenarro, Wesley A. Kirschner, Roger J. Ratzenberger, Jr., Vincent Rozendaal
  • Patent number: 4796176
    Abstract: A multiprocessor computing system is disclosed which includes a system bus, a plurality of processing units and a plurality of synchronous input/output channel controllers. A plurality of priority lines each corresponding to a processing unit are provided through each input/output channel controller in order of priority. A synchronizing signal is generated at the same time in each input/output channel controller in response to the end of an address phase on the system bus. A latch is provided in the input/output controllers which responds to the synchronizing signal by storing the condition of the priority lines and whether an interrupt is pending. In response to a broadcast interrupt origin request instruction from a processing unit, all input/output channel controllers will respond at the same time but only the one with the priority interrupt for the requesting processing unit gives a non-zero response.
    Type: Grant
    Filed: November 15, 1985
    Date of Patent: January 3, 1989
    Assignee: Data General Corporation
    Inventors: Lynn W. D'Amico, James M. Guyer