Patents by Inventor Lynnita K. Knoch

Lynnita K. Knoch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Vertical IGFET configuration having low on-resistance and method
    Patent number: 5703389
    Abstract: A vertical IGFET configuration includes a stripe arrangement having a non-linear shape. In one example, a stripe arrangement (30) has contact cut-out portions (41) and elongated portions (42). The elongated portions (42) have a width (44) that less than the width (43) of the contact cut-out portions (41). The stripe arrangement (30) increases channel density compared to typical individual cell configurations (10) and straight stripe configurations (20) thereby lowering on-resistance.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: December 30, 1997
    Assignee: Motorola, Inc.
    Inventors: Lynnita K. Knoch, Pak Tam
  • Heterojunction bipolar transistor with a thin silicon emitter
    Patent number: 5105250
    Abstract: A heterojunction bipolar transistor having a thin, lightly doped, silicon emitter disposed on a silicon-germanium base layer exhibits low emitter resistance and low emitter-base capacitance. The lightly doped silicon emitter maintains the bandgap differential between silicon-germanium and silicon. The silicon emitter is fabricated such that the silicon emitter will be substantially depleted at zero bias, resulting in low emitter-base resistance and emitter resistance.
    Type: Grant
    Filed: October 9, 1990
    Date of Patent: April 14, 1992
    Assignee: Motorola, Inc.
    Inventors: Gordon Tam, Lynnita K. Knoch