Patents by Inventor M. C. HANG

M. C. HANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230298935
    Abstract: A semiconductor device includes a first polysilicon structure, wherein the first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness. The semiconductor device includes a second polysilicon structure over the first barrier layer, wherein the second polysilicon structure has a second grain size different from the first grain size.
    Type: Application
    Filed: May 24, 2023
    Publication date: September 21, 2023
    Inventors: J. J. LEE, Chun-Tse TSAI, M. C. HANG
  • Patent number: 11676856
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a first polysilicon structure over the substrate, wherein the first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness. The semiconductor device further includes a second polysilicon structure over the first barrier layer, wherein the second polysilicon structure has a second grain size smaller than the first grain size.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: J. J. Lee, Chun-Tse Tsai, M. C. Hang
  • Publication number: 20210351070
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a first polysilicon structure over the substrate, wherein the first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness. The semiconductor device further includes a second polysilicon structure over the first barrier layer, wherein the second polysilicon structure has a second grain size smaller than the first grain size.
    Type: Application
    Filed: July 20, 2021
    Publication date: November 11, 2021
    Inventors: J. J. LEE, Chun-Tse TSAI, M. C. HANG
  • Patent number: 11094584
    Abstract: A method of making a semiconductor device includes depositing a first polysilicon layer over a substrate. The method further includes forming a barrier layer over the first polysilicon layer. The method further includes patterning the first polysilicon layer. The method further includes depositing a second polysilicon layer over the barrier layer, wherein the depositing of the second polysilicon layer includes increasing a grain size of the first polysilicon layer, and causing at least one grain boundary in the first polysilicon layer to contact the barrier layer.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: August 17, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: J. J. Lee, Chun-Tse Tsai, M. C. Hang
  • Publication number: 20200161174
    Abstract: A method of making a semiconductor device includes depositing a first polysilicon layer over a substrate. The method further includes forming a barrier layer over the first polysilicon layer. The method further includes patterning the first polysilicon layer. The method further includes depositing a second polysilicon layer over the barrier layer, wherein the depositing of the second polysilicon layer comprises increasing a grain size of the first polysilicon layer, and causing at least one grain boundary in the first polysilicon layer to contact the barrier layer.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Inventors: J. J. LEE, Chun-Tse TSAI, M. C. HANG
  • Patent number: 10553476
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a first polysilicon structure over the substrate. The first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure. At least one grain boundary of the first polysilicon structure contacts the first barrier layer. The semiconductor device further includes a second polysilicon structure over the first barrier layer. The second polysilicon layer has a second grain size smaller than the first grain size.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: February 4, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: J. J. Lee, Chun-Tse Tsai, M. C. Hang
  • Publication number: 20180342417
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a first polysilicon structure over the substrate. The first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure. At least one grain boundary of the first polysilicon structure contacts the first barrier layer. The semiconductor device further includes a second polysilicon structure over the first barrier layer. The second polysilicon layer has a second grain size smaller than the first grain size.
    Type: Application
    Filed: August 24, 2017
    Publication date: November 29, 2018
    Inventors: J. J. LEE, Chun-Tse TSAI, M. C. HANG