Patents by Inventor M. Chandrika

M. Chandrika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080134110
    Abstract: A novel logic design method for avoiding wiring congestion. According to the novel logic design method, an original gate having multiple inputs coming from different directions and having multiple outputs coming to different directions can be transformed to a logic block that has an input stage and an output stage. The gates of the input stage receive signals from the multiple inputs of the original gate. The gates of the output stage send signals to the multiple outputs of the original gate. Each gate of the input stage is placed in a vicinity of its inputs. Each gate of the output stage is placed in a vicinity of its outputs. The gates of the input and output stages are functionally equivalent to the original gate.
    Type: Application
    Filed: January 17, 2008
    Publication date: June 5, 2008
    Inventors: Chaitra M. Bhat, M. Chandrika, Atsushi Sugai, Toshihiko Yokota
  • Publication number: 20080115094
    Abstract: A novel logic design method for avoiding wiring congestion. According to the novel logic design method, an original gate having multiple inputs coming from different directions and having multiple outputs coming to different directions can be transformed to a logic block that has an input stage and an output stage. The gates of the input stage receive signals from the multiple inputs of the original gate. The gates of the output stage send signals to the multiple outputs of the original gate. Each gate of the input stage is placed in a vicinity of its inputs. Each gate of the output stage is placed in a vicinity of its outputs. The gates of the input and output stages are functionally equivalent to the original gate.
    Type: Application
    Filed: January 15, 2008
    Publication date: May 15, 2008
    Inventors: Chaitra Bhat, M. Chandrika, Atsushi Sugai, Toshihiko Yokota
  • Patent number: 7356797
    Abstract: A novel logic design method for avoiding wiring congestion. According to the novel logic design method, an original gate having multiple inputs coming from different directions and having multiple outputs coming to different directions can be transformed to a logic block that has an input stage and an output stage. The gates of the input stage receive signals from the multiple inputs of the original gate. The gates of the output stage send signals to the multiple outputs of the original gate. Each gate of the input stage is placed in a vicinity of its inputs. Each gate of the output stage is placed in a vicinity of its outputs. The gates of the input and output stages are functionally equivalent to the original gate.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: April 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Chaitra M. Bhat, M. Chandrika, Atsushi Sugai, Toshihiko Yokota
  • Publication number: 20060282809
    Abstract: A novel logic design method for avoiding wiring congestion. According to the novel logic design method, an original gate having multiple inputs coming from different directions and having multiple outputs coming to different directions can be transformed to a logic block that has an input stage and an output stage. The gates of the input stage receive signals from the multiple inputs of the original gate. The gates of the output stage send signals to the multiple outputs of the original gate. Each gate of the input stage is placed in a vicinity of its inputs. Each gate of the output stage is placed in a vicinity of its outputs. The gates of the input and output stages are functionally equivalent to the original gate.
    Type: Application
    Filed: June 14, 2005
    Publication date: December 14, 2006
    Applicant: International Business Machines Corporation
    Inventors: Chaitra Bhat, M. Chandrika, Atsushi Sugai, Toshihiko Yokota