Abstract: A scalable switch matrix and demodulator bank architecture for a satellite payload processor wherein the demodulators are connected to the output ports of the switches as the data load on the uplink beams varies. The switch matrix includes a first switch layer for receiving the uplink transmission beams and a plurality of demodulators connected to the output parts of the first switch layer. The number of demodulators is limited by the number of active uplink sub-bands which is generally less than the number of sub-bands per beam times the number of transmission beams. Thus, only a relatively few number of demodulators are distributed among the uplink transmission beams as required. This results in a readily scalable architecture having higher demodulation utilization rates than dedicated demodulation architectures.

Abstract: An ATM network comprises a central call processor, and one or more remotely located ATM bridge nodes, whereby the call processor is separated from the switching fabric in the ATM bridge nodes. A plurality of preestablished permanent virtual paths are defined within the ATM bridge nodes. In setting up a connection, a source user terminal communicates with the central call processor to obtain the virtual path identifier associated with the virtual path to one or more destination user terminals. The user data is segmented into one or more cells that incorporate a header containing the appropriate VPI. The ATM bridge node extracts the VPI from incoming cells, and then directs these cells to the appropriate output ports in accordance with a routing table. The instant invention provides for improved network efficiency and upgradability, and is particularly suited to satellite based ATM networks.

Abstract: A scalable switch matrix and demodulator bank architecture for a satellite payload processor wherein the demodulators are connected to the output ports of the switches as the data load on the uplink beams varies. The switch matrix includes a first switch layer for receiving the uplink transmission beams and a plurality of demodulators connected to the output parts of the first switch layer. The number of demodulators is limited by the number of active uplink sub-bands which is generally less than the number of sub-bands per beam times the number of transmission beams. Thus, only a relatively few number of demodulators are distributed among the uplink transmission beams as required. This results in a readily scalable architecture having higher demodulation utilization rates than dedicated demodulation architectures.

Abstract: A scalable switch matrix and demodulator bank architecture for a satellite payload processor wherein the demodulators are connected to the output ports of the switches as the data load on the uplink beams varies. The switch matrix includes a first switch layer for receiving the uplink transmission beams and a plurality of demodulators connected to the output parts of the first switch layer. The number of demodulators is limited by the number of active uplink sub-bands which is generally less than the number of sub-bands per beam times the number of transmission beams. Thus, only a relatively few number of demodulators are distributed among the uplink transmission beams as required. This results in a readily scalable architecture having higher demodulation utilization rates than dedicated demodulation architectures.

Abstract: A scalable switch matrix and demodulator bank architecture for a satellite payload processor wherein the demodulators are connected to the output ports of the switches as the data load on the uplink beams varies. The switch matrix includes a first switch layer for receiving the uplink transmission beams and a plurality of demodulators connected to the output parts of the first switch layer. The number of demodulators is limited by the number of active uplink sub-bands which is generally less than the number of sub-bands per beam times the number of transmission beams. Thus, only a relatively few number of demodulators are distributed among the uplink transmission beams as required. This results in a readily scalable architecture having higher demodulation utilization rates than dedicated demodulation architectures.

Abstract: A scalable switch matrix and demodulator bank architecture for a satellite payload processor wherein the demodulators are connected to the output ports of the switches as the data load on the uplink beams varies. The switch matrix includes a first switch layer for receiving the uplink transmission beams and a plurality of demodulators connected to the output parts of the first switch layer. The number of demodulators is limited by the number of active uplink sub-bands which is generally less than the number of sub-bands per beam times the number of transmission beams. Thus, only a relatively few number of demodulators are distributed among the uplink transmission beams as required. This results in a readily scalable architecture having higher demodulation utilization rates than dedicated demodulation architectures.

Abstract: Bandwidth is increased and noise may be reduced in a shared hybrid fiber-coax transmission system (10) by digitally modulating upstream information onto a high frequency band (e.g., 750-1000 MHz) and thereafter digitally regenerating both the high frequency upstream information as well as a portion of the downstream information not used for broadcast video (i.e., the 500-750 MHz band).

Abstract: Bandwidth is increased and noise may be reduced in a shared hybrid fiber-coax transmission system (10) by digitally modulating upstream information onto a high frequency band (e.g., 750-1000 MHz) and thereafter digitally regenerating the high frequency upstream information.