Patents by Inventor M. Salleh Ismail
M. Salleh Ismail has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6495388Abstract: A surface micro-machined sensor uses a pedestal in a cavity to support a flexible structure and reduce the span of the flexible structure. The reduced span per sense area allows larger sensor areas without permitting forces to permanently deform the flexible structure or cause the structure to touch an opposite wall of the cavity. The flexible structure bonded to the pedestal and an elevated region surrounding the pedestal defines a cavity between the flexible membrane and a lower plane region. Active regions can be formed in the lower plane region for capacitors or transistors. A pedestal can be of various shapes including a circular, ovoid, rectangular or polygonal shape. The lower plane region can be of various shapes including a ring or donut shape, ovoid, rectangular or polygonal shape with an inner dimension corresponding to the outer dimension of the pedestal. The elevated region can be of various shapes with an inner dimension corresponding to the outer dimension of the lower plane region.Type: GrantFiled: March 29, 2000Date of Patent: December 17, 2002Assignee: Kavlico CorporationInventor: M. Salleh Ismail
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Patent number: 6211558Abstract: A surface micro-machined sensor uses a pedestal in a cavity to support a flexible structure and reduce the span of the flexible structure. The reduced span per sense area allows larger sensor areas without permitting forces to permanently deform the flexible structure or cause the structure to touch an opposite wall of the cavity. The flexible structure bonded to the pedestal and an elevated region surrounding the pedestal defines a cavity between the flexible membrane and a lower plane region. Active regions can be formed in the lower plane region for capacitors or transistors. A pedestal can be of various shapes including a circular, ovoid, rectangular or polygonal shape. The lower plane region can be of various shapes including a ring or donut shape, ovoid, rectangular or polygonal shape with an inner dimension corresponding to the outer dimension of the pedestal. The elevated region can be of various shapes with an inner dimension corresponding to the outer dimension of the lower plane region.Type: GrantFiled: July 18, 1997Date of Patent: April 3, 2001Assignee: Kavlico CorporationInventors: M. Salleh Ismail, Raffi M. Garabedian
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Patent number: 6008113Abstract: A jig for a fusion bonding process includes a sealable chamber having a first station for a first wafer and a second station for a second wafer. The wafers are initially separated from each other while a vacuum is created in the chamber. In one embodiment of the invention, movably mounted spacers separate the wafers while the vacuum is formed. The spacers are then moved to allow the wafers to come into contact and form an initial bond. In another embodiment, wafers in the first and second stations are tilted away from each other so that gravity keeps the wafers separated while the vacuum is formed. After the vacuum is formed, the chamber is rotated so that gravity pushes the two wafers together. In either embodiment, a mechanical pushing system or vibrational energy can apply force to induce or improve the initial bond. The initial bond seals cavities formed between the wafers.Type: GrantFiled: May 19, 1998Date of Patent: December 28, 1999Assignee: Kavlico CorporationInventors: M. Salleh Ismail, Jeffrey K. Wong
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Patent number: 5966617Abstract: A multiple LOCOS (local oxidation) process shapes a surface of a substrate to form a series of planar regions which are vertically separated from each other. One exemplary process forms a hard mask layer for each LOCOS operation. Another exemplary process includes forming a silicon nitride mask layer and repeatedly changing the pattern of that mask layer. Each change in the pattern corresponds to a planar region to be formed; and after each change, oxide is grown in openings through the mask layer. The growth of oxide consumes part of the substrate and provides a vertical separation between the planar level corresponding to the pattern and a next higher planar level. Regions of the substrate once exposed by a mask pattern can remain exposed so that subsequent LOCOS operations maintain previously established separations between levels. A hard mask layer can include a polysilicon layer which protect a silicon nitride layer from conversion to oxide during the repeated LOCOS operations.Type: GrantFiled: September 20, 1996Date of Patent: October 12, 1999Assignee: Kavlico CorporationInventor: M. Salleh Ismail
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Patent number: 5929498Abstract: A semiconductor device has a flexible structure bonded to a semiconductor substructure to form a cavity. The flexible structure is bonded over a conducting feed-through without the feed-through interfering with a hermetic seal formed by bonding. One embodiment of the device includes depressions that contain edges of a diffused feed-through so that imperfections at the edge of the diffusion do not interfere with bonding. The flexible structure is bonded to elevated areas thus hiding the imperfections. In one embodiment, a first elevated region is surrounded by a second elevated region, and diffusion for the feed-through extends from an active region in the cavity across the first elevated region with edges of the diffusion being between the first and second elevated regions. The flexible structure can thus bond to the first and second elevated regions without interference from the edge of the diffused feed-through.Type: GrantFiled: March 17, 1998Date of Patent: July 27, 1999Assignee: Kavlico CorporationInventors: M. Salleh Ismail, Raffi M. Garabedian, Max E. Nielsen, Gary J. Pashby, Jeffrey K. K. Wong
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Patent number: 5923952Abstract: A semiconductor device has a flexible structure bonded to a semiconductor substructure to form a cavity. The flexible structure is bonded over a conducting feed-through without the feed-through interfering with a hermetic seal formed by bonding. One embodiment of the device includes depressions that contain edges of a diffused feed-through so that imperfections at the edge of the diffusion do not interfere with bonding. The flexible structure is bonded to elevated areas thus hiding the imperfections. In one embodiment, a first elevated region is surrounded by a second elevated region, and diffusion for the feed-through extends from an active region in the cavity across the first elevated region with edges of the diffusion being between the first and second elevated regions. The flexible structure can thus bond to the first and second elevated regions without interference from the edge of the diffused feed-through.Type: GrantFiled: July 18, 1997Date of Patent: July 13, 1999Assignee: Kavlico CorporationInventors: M. Salleh Ismail, Raffi M. Garabedian, Max E. Nielsen, Gary J. Pashby, Jeffrey K. K. Wong
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Patent number: 5578843Abstract: Fabrication of semiconductor devices with movable structures includes local oxidation of a wafer and oxide removal to form a depression in an elevated bonding surface. A second wafer is fusion bonded to the elevated bonding surface and shaped to form a flexible membrane. An alternative fabrication technique forms a spacer having a depression on a first wafer and active regions on a second wafer, and fusion bonds the wafers together with the depression over the active regions. Devices formed are integrable with standard MOS devices and include FETs, capacitors, and sensors with movable membranes. An FET sensor has gate and drain coupled together and a drain-source voltage which depends on the gate's deflection. Selected operating current, channel length, and channel width provide a drain-source voltage linearly related to gate deflection.Type: GrantFiled: October 6, 1994Date of Patent: November 26, 1996Assignee: Kavlico CorporationInventors: Raffi M. Garabedian, M. Salleh Ismail, Gary J. Pashby
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Patent number: 5576251Abstract: Fabrication of semiconductor devices with movable structures includes local oxidation of a wafer and oxide removal to form a depression in an elevated bonding surface. A second wafer is fusion bonded to the elevated bonding surface and shaped to form a flexible membrane. An alternative fabrication technique forms a spacer having a depression on a first wafer and active regions on a second wafer, and fusion bonds the wafers together with the depression over the active regions. Devices formed are integrable with standard MOS devices and include FETs, capacitors, and sensors with movable membranes. An FET sensor has gate and drain coupled together and a drain-source voltage which depends on the gate's deflection. Selected operating current, channel length, and channel width provide a drain-source voltage linearly related to gate deflection.Type: GrantFiled: February 22, 1995Date of Patent: November 19, 1996Assignee: Kavlico Corp.Inventors: Raffi M. Garabedian, M. Salleh Ismail, Gary J. Pashby, Jeffrey K. K. Wong