Abstract: An improved method and apparatus for reducing the amount of memory required to implement a digital echo modulator. A single permanent memory stores digital representations of a series of samples of a signal element for several phases of the signal element. A temporary memory is provided to store the digital representations from a plurality of signal elements to be overlapped. The signal element values are clocked out of the permanent memory and into the temporary memory at a rate, during each sampling interval, equal to the number of overlapping signal elements. The contents of the temporary memory are then provided to a summation circuit for producing a digital representation of the composite signal during that sampling interval. Phases of the signal element which are 180.degree. out of phase with the stored phases are generated using two's complement circuitry.