Patents by Inventor Machiko SUENAGA

Machiko SUENAGA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9841674
    Abstract: A patterning method according to one embodiment includes forming a ground layer on a processing target layer. The ground layer has higher affinity for one of a first segment and a second segment contained in a self-assembly material than for the other segment. The neutral layer is patterned on the ground layer. The neutral layer is neutral to the first segment and the second segment. Exposing surfaces of the ground layer and the neutral layer is irradiated with an energy ray. The self-assembly material is applied onto the ground layer and the neutral layer. The self-assembly material is phase-separated into a first domain including the first segment and a second domain including the second segment. One of the first domain and the second domain is selectively removed.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: December 12, 2017
    Assignee: Toshiba Memory Corporation
    Inventors: Hideaki Sakurai, Machiko Suenaga, Takeharu Motokawa, Masatoshi Terayama
  • Publication number: 20160077436
    Abstract: A patterning method according to one embodiment includes forming a ground layer on a processing target layer. The ground layer has higher affinity for one of a first segment and a second segment contained in a self-assembly material than for the other segment. The neutral layer is patterned on the ground layer. The neutral layer is neutral to the first segment and the second segment. Exposing surfaces of the ground layer and the neutral layer is irradiated with an energy ray. The self-assembly material is applied onto the ground layer and the neutral layer. The self-assembly material is phase-separated into a first domain including the first segment and a second domain including the second segment. One of the first domain and the second domain is selectively removed.
    Type: Application
    Filed: March 11, 2015
    Publication date: March 17, 2016
    Inventors: Hideaki SAKURAI, Machiko SUENAGA, Takeharu MOTOKAWA, Masatoshi TERAYAMA
  • Publication number: 20160068430
    Abstract: A patterning method according to one embodiment includes forming on a glass substrate a guide pattern including a first region at which the glass substrate is exposed, and a second region on which a pattern is formed. A self-assembly material including a first segment pinned to the first region, and a second segment is applied onto the guide pattern. The self-assembly material is phase-separated into a first domain including the first: segment and a second domain including the second segment. One of the first domain and the second domain is selectively removed. The width of the first region is not less than 0.8 times and not more than 1.15 times as large as the width of the first domain.
    Type: Application
    Filed: March 11, 2015
    Publication date: March 10, 2016
    Inventors: Machiko SUENAGA, Hideaki Sakurai, Takeharu Motokawa, Masatoshi Terayama
  • Publication number: 20160068429
    Abstract: A pattern forming method includes forming a first region and a second region on a to-be-processed layer. The first region includes a guide pattern. In the second region, an affinity to one of the first segment and the second segment which are included in a self-assembly material, is higher than the affinity to the other. The self-assembly material is applied onto the first region and the second region. The self-assembly material is phase-separated into a first domain including the first segment, and a second domain including the second segment. Any one of the first domain and the second domain is selectively removed.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 10, 2016
    Inventors: Masatoshi TERAYAMA, Machiko SUENAGA, Takeharu MOTOKAWA, Hideaki SAKURAI