Patents by Inventor Madan M. Das

Madan M. Das has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for verifying power specifications of a low power design
    Patent number: 7694251
    Abstract: Method and system for verifying power specifications of a low power design are disclosed. The method includes receiving a register-transfer level (RTL) netlist representation of the low power design, receiving a power specification file for describing power requirements of the low power design and verifying the power specification file in accordance with the RTL netlist representation of the low power design. The method further includes verifying completeness, compatibility, and consistency of power requirements for the low power design.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: April 6, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bharat Chandramouli, Huan-Chih Tsai, Manish Pandey, Chih-Chang Lin, Madan M. Das
  • Method and system for verifying power specifications of a low power design
    Publication number: 20080127015
    Abstract: Method and system for verifying power specifications of a low power design are disclosed. The method includes receiving a register-transfer level (RTL) netlist representation of the low power design, receiving a power specification file for describing power requirements of the low power design and verifying the power specification file in accordance with the RTL netlist representation of the low power design. The method further includes verifying completeness, compatibility, and consistency of power requirements for the low power design.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 29, 2008
    Inventors: Bharat Chandramouli, Huan-Chih Tsai, Manish Pandey, Chih-Chang Lin, Madan M. Das