Abstract: Methods, systems, and devices for techniques for enhanced read performance on blocks of memory cells are described. The method may involve selecting a first block of memory cells from a set of blocks of memory cells of a memory system based on a condition of the first block of memory cells being met and setting one or more programming parameters corresponding to the first block of memory cells such that the one or more programming parameters are within a threshold value of one or more programming parameters corresponding to a second block associated with a storage density different from a storage density of the first block of memory cells. Further, the method may involve performing an operation on the block of memory cells according to the one or more programming parameters.

Abstract: Methods, systems, and devices for techniques for enhanced read performance on blocks of memory cells are described. The method may involve selecting a first block of memory cells from a set of blocks of memory cells of a memory system based on a condition of the first block of memory cells being met and setting one or more programming parameters corresponding to the first block of memory cells such that the one or more programming parameters are within a threshold value of one or more programming parameters corresponding to a second block associated with a storage density different from a storage density of the first block of memory cells. Further, the method may involve performing an operation on the block of memory cells according to the one or more programming parameters.

Abstract: Methods, systems, and devices for host-enabled block swap techniques are described. In some examples, a host system may receive an indication of a health metric associated with a first physical block and a second physical block of a memory system, where a first logical block of the memory system is associated with a first type of data and is mapped to the first physical block, and where a second logical block of the memory system is associated with a second type of data. The host system may then determine that the health metric associated with the first physical block satisfies a threshold and may update a mapping associated with the first virtual block, the second virtual block, the first physical block, and the second physical block.

Abstract: Methods, systems, and devices for block repurposing based on health metrics are described. The method may involve setting a storage state of a block of memory cells, the storage state corresponding to a storage density of the block of memory cells or an access mode of the block of memory cells. Further, the method may involve updating the storage state of the block of memory cells based on a health condition associated with the block of memory cells and accessing the block of memory cells based on the updated storage state of the block of memory cells.

Abstract: Methods, systems, and devices for low latency storage based on data size are described. A memory system may include logic, a processor, a first memory, and a second memory. The logic may be configured to receive commands, or data, or both, from a host system. The first memory and the second memory may be coupled with the processor. The processor may be configured to store, or to cause the storage of, data for commands associated with data that are smaller than a threshold in the first memory and to store data for commands associated with data that are larger than the threshold in the second memory. A first communication path between the logic and the first memory may be associated with a faster transfer speed than a second communication path between the logic and the second memory.

Abstract: Methods, systems, and devices for low latency storage based on data size are described. A memory system may include logic, a processor, a first memory, and a second memory. The logic may be configured to receive commands, or data, or both, from a host system. The first memory and the second memory may be coupled with the processor. The processor may be configured to store, or to cause the storage of, data for commands associated with data that are smaller than a threshold in the first memory and to store data for commands associated with data that are larger than the threshold in the second memory. A first communication path between the logic and the first memory may be associated with a faster transfer speed than a second communication path between the logic and the second memory.

Abstract: Systems and methods are provided for reducing signal distortion during tandem free operation signal transmission from a first mobile station to a second mobile station over a network; the systems and methods reduce the signal distortion in tandem free operation mobile to mobile communications that occurs when there is a loss of synchronicity between a plurality of transcoder rate adapter units that is caused by oscillation of the transcoder rate adapter units between different functional states during signal transmission. The systems and methods of the invention reduce the time gaps that are associated with these oscillations, resulting in reduced signal distortion and improved signal transmission.

Abstract: Systems and methods are provided for reducing signal distortion during tandem free operation signal transmission from a first mobile station to a second mobile station over a network; the systems and methods reduce the signal distortion in tandem free operation mobile to mobile communications that occurs when there is a loss of synchronicity between a plurality of transcoder rate adapter units that is caused by oscillation of the transcoder rate adapter units between different functional states during signal transmission. The systems and methods of the invention reduce the time gaps that are associated with these oscillations, resulting in reduced signal distortion and improved signal transmission.