Patents by Inventor Madhavan Sainath Rao Pissay

Madhavan Sainath Rao Pissay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11946973
    Abstract: In an example, a scan flip-flop includes a first transistor and a second transistor coupled to a data input. The scan flip-flop includes a third transistor coupled to a clock input and a fourth transistor coupled to an inverse clock input. The scan flip-flop includes a fifth transistor coupled to a scan enable input and the first transistor, and includes a sixth transistor coupled to an inverse scan enable input and the second transistor. The scan flip-flop includes an input multiplexer that includes a seventh transistor and eighth transistor coupled to the scan data input, a ninth transistor coupled to the scan enable input, and a tenth transistor coupled to the inverse scan enable input. The input multiplexer includes a first diode-connected transistor coupled between a first voltage rail and the seventh transistor, and includes a second diode-connected transistor coupled between a second voltage rail and the eighth transistor.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: April 2, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Arnab Khawas, Badarish Subbannavar, Madhavan Sainath Rao Pissay