Abstract: A device verification system includes a device under test (DUT) including digital logic and a plurality of digital memories coupled to the digital logic; a plurality of hardware Verification Intellectual Property (VIP) modules coupled to the DUT to verify hardware of the DUT; and a plurality of software VIP modules coupled to the DUT to verify firmware of the DUT. A method for verifying the functionality of a device under test includes automatically developing code segments representing a series of firmware test patterns with a software Verification Intellectual Property (VIP) module; transferring code segments representing the series of firmware test patterns into a digital memory of a device under test (DUT) that includes digital logic; and monitoring the functional operation of the DUT as it uses the digital logic to execute the code segments representing the series of firmware test patterns stored in digital memory.