Abstract: A system and method providing, via a single output electrode of an integrated circuit having internal circuitry, a status signal having time multiplexed states indicative of a power on reset condition for external circuitry following enablement of operations of portions of the internal circuitry, and further indicative of subsequent operation statuses of the internal circuitry portions.

Abstract: A switching regulator circuit is provided. The switching regulator circuit includes an oscillator circuit which includes a capacitor, a switch, a comparator, a variable resistor, and a modulating signal generation circuit. The capacitor is arranged to receive a first current to provide a ramp voltage. Also, the variable resistor is arranged to receive a second current to provide a reference voltage. The resistance of the variable resistor is modulated based on a modulating signal. The comparator is arranged to compare the ramp voltage with a reference voltage to provide a clock signal. Further, the switch is arranged to discharge the capacitor when the clock signal is asserted. The modulating signal generation circuit is arranged to provide the modulating waveform as a sawtooth signal, or other type of modulating waveform suitable for spread-spectrum modulation. Accordingly, the clock signal is a spread-spectrum clock signal.

Abstract: A system and method providing, via a single output electrode of an integrated circuit having internal circuitry, a status signal having time multiplexed states indicative of a power on reset condition for external circuitry following enablement of operations of portions of the internal circuitry, and further indicative of subsequent operation statuses of the internal circuitry portions.

Abstract: A PMU that includes LDOs is provided. The PMU also includes, for each LDO, a corresponding reference circuit that provides a reference voltage for the LDO. Further, the PMU includes a central bias circuit that provides a reference current to each of the voltage reference circuits. Each reference circuit includes a delay circuit, a counter, a binary-weighted resistor ladder, and switches coupled to the resistor ladder. In each reference circuit, the resistor ladder provides the corresponding reference voltage from the received reference current. Further, the counter controls the switches to “step up” the reference voltage in a well-defined manner during the power-up sequence. The reference voltage is stepped up from a minimum voltage to a final reference voltage by one least significant bit at each clock pulse. Also, the delay circuits are employed to control when each reference voltage begins to increase from the minimum voltage.