Abstract: The present invention describes light fixtures comprising an array of self-contained LED tiles for illuminating light from a surface area of a respective light fixture. Each of the array of LED tiles is a self-contained lamp that contains its respective own AC or DC input power supply and LED driver, its respective heat dissipation element, and its respective light collation element. The array of tiles makes the total illumination from the array to be sufficiently bright, even though any given LED tile might only have a modest amount of light output. Embodiments of the LED tiles for use with various lamp fixtures include, but not limited to, a hexagon-shaped LED tile, a square-shaped LED tile, an equilateral triangle-shaped LED tile, and a rectangle-shaped LED tile with an aspect ratio, for example, of 3:1. The different types of LED tiles are suitable for use to cover various types of surfaces of lamp fixtures.

Abstract: A compact AC or DC input power supply device and method are described with an electrical power sampling circuit that includes a first switch for receiving the AC or DC voltage signal and capable of withstanding a high voltage input. A zero-crossing detector generates a zero-crossing detection ZCD signal when an input AC or DC voltage crosses or is above a zero voltage. A control circuit is coupled to the first switch for controlling the activation of the first switch from the generation of a zero-crossing detection signal. The first switch turns ON when the AC or DC input voltage is above a zero voltage, which safeguards the transfer of electrical energy to a first capacitor that is connected to the first switch. As a result, the selection of the first capacitor in the power supply device can be a low voltage capacitor.

Abstract: A reference signal generator for generating an output reference signal having a target duty cycle. The reference signal generator comprises a sawtooth generator for receiving an input reference signal having a reference frequency and generating a sawtooth waveform having the reference frequency. Comparison circuitry compares the sawtooth waveform to a reference voltage and generates the output reference signal. The output reference signal is Logic 1 when the sawtooth waveform is greater than the reference voltage and is Logic 0 when the sawtooth waveform is less than the reference voltage. Feedback circuitry determines a duty cycle of the output reference signal by comparing a first time period when the output reference signal is Logic 1 to a second time period when the output reference signal is Logic 0. The feedback circuitry adjusts a value of the reference voltage to cause the output reference signal to achieve the target duty cycle.

Abstract: An analog-to-digital converter includes a sample and hold tree having a first level and at least one additional level. Each level includes one or more sample and hold circuits operable to sample an input voltage and produce a corresponding output voltage. The input voltage sampled by the one or more sample and hold circuits in each additional level represents the output voltage from the one or more sample and hold circuits in a preceding level. The analog-to-digital converter also includes a plurality of comparators. Each comparator is operable to compare the output voltage from one of the sample and hold circuits with one of a plurality of reference voltages. In addition, the analog-to-digital converter includes a state machine operable to receive outputs from the comparators and generate a digital output value.

Abstract: A reference signal generator for generating an output reference signal having a target duty cycle. The reference signal generator comprises a sawtooth generator for receiving an input reference signal having a reference frequency and generating a sawtooth waveform having the reference frequency. Comparison circuitry compares the sawtooth waveform to a reference voltage and generates the output reference signal. The output reference signal is Logic 1 when the sawtooth waveform is greater than the reference voltage and is Logic 0 when the sawtooth waveform is less than the reference voltage. Feedback circuitry determines a duty cycle of the output reference signal by comparing a first time period when the output reference signal is Logic 1 to a second time period when the output reference signal is Logic 0. The feedback circuitry adjusts a value of the reference voltage to cause the output reference signal to achieve the target duty cycle.