Abstract: Certain aspects of the present disclosure provide techniques for performing face recognition in low light conditions using an electronic device. One aspect provides a method including determining if a brightness level within a viewing area of the electronic device satisfies a threshold. The method includes increasing a luminance output of the electronic device from a first luminance level to a second luminance level when the brightness level does not satisfy the threshold. The method includes capturing an image at the second luminance level when the brightness level does not satisfy the threshold. The method includes capturing the image at the first luminance level when the brightness level satisfies the threshold. The method includes detecting a face in the image. The method includes determining if the face corresponds to an authorized user. The method includes unlocking the electronic device when the face corresponds to an authorized user.

Abstract: An embodiment is directed to an apparatus that comprises a host controller and a flash memory. The host controller monitors a temperature in a first memory block of the flash memory (e.g., based on a reported temperature measurements from the flash memory), and selectively synchronizes a first refresh of the first memory block with a second refresh of a second memory block of the flash memory based in part upon the monitored temperature. For example, an immediate refresh of the first memory block may be performed if there is a pending I/O request for the first memory block, an error rate associated with the first memory block exceeds an error rate threshold and/or the monitored temperature of the first memory block exceeds a temperature threshold; otherwise, a synchronized refresh of the first and second memory blocks may be executed.

Abstract: In a conventional system with a UFS storage device connected to a UFS host over one or more lanes, the lanes can support different transmission speeds, referred to as gears. The UFS host shifts lanes and gears based on the type of request it receives. When the requests arrive in random order of gear requirements, the frequent shifting of the lanes and gears causes significant power consumption. To address this issue, it is proposed to implement a queue-based shifting in which arriving requests may be queued based on their gear requirements. When a queue is selected, multiple requests in the selected queue, which are all of same or similar gear requirement, can be served. This can reduce the frequency of gear shifting, and hence reduce power consumption.

Abstract: An embodiment is directed to an apparatus that comprises a host controller and a flash memory. The host controller monitors a temperature in a first memory block of the flash memory (e.g., based on a reported temperature measurements from the flash memory), and selectively synchronizes a first refresh of the first memory block with a second refresh of a second memory block of the flash memory based in part upon the monitored temperature. For example, an immediate refresh of the first memory block may be performed if there is a pending I/O request for the first memory block, an error rate associated with the first memory block exceeds an error rate threshold and/or the monitored temperature of the first memory block exceeds a temperature threshold; otherwise, a synchronized refresh of the first and second memory blocks may be executed.

Abstract: In a conventional system with an embedded UFS and an external UFS card are connected to a UFS host, the UFS host is only able to transfer data to the embedded UFS or to the an external UFS card, but not to both at the same time. To address this issue, it is proposed to provide a host that is capable of concurrently transferring data to multiple storage devices.

Abstract: Aspects include computing devices and methods implemented by computing devices for smart of handling input/output interrupts associated with device setting levels. Various aspects may include receiving a hardware input/output interrupt from a hardware interface, updating an adjusted feature setting level, determining whether the adjusted feature setting level equals a feature setting level limit, and changing an interrupt service routine address stored at a first location of a hardware input/output register corresponding with an interrupt service routine associated with the hardware input/output interrupt to a first data in response to determining that the adjusted feature setting level of the computing device equals the adjusted feature setting level limit.