Patents by Inventor Madison D. Drake

Madison D. Drake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112734
    Abstract: A variety of applications can include memory devices designed to provide enhanced gate-induced-drain-leakage (GIDL) current during memory erase operations. The enhanced operation can be provided by enhancing the electric field in the channel structures of select gate transistors to strings of memory cells. The channel structures can be implemented as a segmented portion for drains and a portion opposite a gate. The segmented portion includes one or more fins and one or more non-conductive regions with both fins and non-conductive regions extending vertically from the portion opposite the gate. Variations of a border region for the portion opposite the gate with the segmented portion can include fanged regions extending from the fins into the portion opposite the gate or rounded border regions below the non-conductive regions. Such select gate transistors can be formed using a single photo mask process. Additional devices, systems, and methods are discussed.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Inventors: Darwin A. Clampitt, Albert Fayrushin, Matthew J. King, Madison D. Drake
  • Patent number: 11887667
    Abstract: A variety of applications can include memory devices designed to provide enhanced gate-induced-drain-leakage (GIDL) current during memory erase operations. The enhanced operation can be provided by enhancing the electric field in the channel structures of select gate transistors to strings of memory cells. The channel structures can be implemented as a segmented portion for drains and a portion opposite a gate. The segmented portion includes one or more fins and one or more non-conductive regions with both fins and non-conductive regions extending vertically from the portion opposite the gate. Variations of a border region for the portion opposite the gate with the segmented portion can include fanged regions extending from the fins into the portion opposite the gate or rounded border regions below the non-conductive regions. Such select gate transistors can be formed using a single photo mask process. Additional devices, systems, and methods are discussed.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: January 30, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Darwin A. Clampitt, Albert Fayrushin, Matthew J. King, Madison D Drake
  • Patent number: 11641681
    Abstract: Methods, apparatuses, and non-transitory machine-readable media associated with data transmission are described. Data transmission and remote activity monitoring can include detecting a triggering event and determining an output data type associated with the triggering event, wherein the output data type is a first type for display at a second device or a second type to initiate communication between the first device and one or more second devices. Data transmission can include transmitting the output data to the second device via a device-to-device data link in response to determining the output data type comprises the first type. In response to determining the output data type comprises the second type, data transmission can include initiating a two-way communication path with the second device, the two-way communication path comprising a device-to-device data link or a data link with a base station or access point and transmitting the output data to the second device.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: May 2, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Kristina L. Ming, Lisa R. Copenspire-Ross, Madison D. Drake, Rosa M. Avila-Hernandez
  • Publication number: 20230041326
    Abstract: A variety of applications can include memory devices designed to provide enhanced gate-induced-drain-leakage (GIDL) current during memory erase operations. The enhanced operation can be provided by enhancing the electric field in the channel structures of select gate transistors to strings of memory cells. The channel structures can be implemented as a segmented portion for drains and a portion opposite a gate. The segmented portion includes one or more fins and one or more non-conductive regions with both fins and non-conductive regions extending vertically from the portion opposite the gate. Variations of a border region for the portion opposite the gate with the segmented portion can include fanged regions extending from the fins into the portion opposite the gate or rounded border regions below the non-conductive regions. Such select gate transistors can be formed using a single photo mask process. Additional devices, systems, and methods are discussed.
    Type: Application
    Filed: August 9, 2021
    Publication date: February 9, 2023
    Inventors: Darwin A. Clampitt, Albert Fayrushin, Matthew J. King, Madison D. Drake
  • Publication number: 20220287112
    Abstract: Methods, apparatuses, and non-transitory machine-readable media associated with data transmission are described. Data transmission and remote activity monitoring can include detecting a triggering event and determining an output data type associated with the triggering event, wherein the output data type is a first type for display at a second device or a second type to initiate communication between the first device and one or more second devices. Data transmission can include transmitting the output data to the second device via a device-to-device data link in response to determining the output data type comprises the first type. In response to determining the output data type comprises the second type, data transmission can include initiating a two-way communication path with the second device, the two-way communication path comprising a device-to-device data link or a data link with a base station or access point and transmitting the output data to the second device.
    Type: Application
    Filed: March 2, 2021
    Publication date: September 8, 2022
    Inventors: Kristina L. Ming, Lisa R. Copenspire-Ross, Madison D. Drake, Rosa M. Avila-Hernandez
  • Publication number: 20220216094
    Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, strings of memory cells vertically extending through the stack structure, the strings of memory cells individually comprising a channel material vertically extending through the stack structure, a conductive contact structure vertically overlying and in electrical communication with the channel material of a string of memory cells of the strings of memory cells, and a void laterally neighboring the conductive contact structure, the conductive contact structure separated from a laterally neighboring conductive contact structure by the void, a dielectric material, and an additional void laterally neighboring the laterally neighboring conductive contact structure. Related memory devices, electronic systems, and methods are also described.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 7, 2022
    Inventors: Darwin A. Clampitt, John D. Hopkins, Madison D. Drake