Patents by Inventor Magathi Jayaram Willis

Magathi Jayaram Willis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10558236
    Abstract: A direct digital synthesizer (DDS) is controlled by a suitably configured programmable logic device (PLD). The DDS includes a digital analog converter (DAC), and a coupled driver/buffer configured to drive relatively high capacitive loads with substantially rail to rail sinusoidal driver output signals and with little to no waveform distortion. The DAC includes a PMOS and NMOS DACs, and a switch configured to select the PMOS DAC for negative portions and the NMOS DAC for positive portions of an output analog signal generated by the DAC. The driver includes a pair of input differential amplifiers, PMOS and NMOS structures, which may be variable, and a pair of variable current sources. The PLD controls variable elements of the DDS to adjust the achievable positive and negative slew rates of the DDS, independently of one another, to reduce or eliminate risk of signal distortion while maintaining substantially stable rail to rail output.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: February 11, 2020
    Assignee: Lattice Semiconductor Corporation
    Inventors: Vinh Ho, Magathi Jayaram Willis, Keith Truong, Hamid Ghezelayagh
  • Publication number: 20190004561
    Abstract: Systems and methods for direct digital synthesis are disclosed. A direct digital synthesis system includes a direct digital synthesizer (DDS) and a programmable logic device (PLD) configured to control the DDS. The DDS includes at least one digital analog converter (DAC) and a coupled driver/buffer configured to drive relatively high capacitive loads with substantially rail to rail sinusoidal driver output signals and with little to no waveform distortion. The DAC includes a PMOS DAC and an NMOS DAC and a switch configured to select the PMOS DAC for negative portions and the NMOS DAC for positive portions of an output analog signal generated by the DAC. The driver includes a pair of input differential amplifiers, PMOS and NMOS transistor structures, which may be variable, and a pair of variable current sources.
    Type: Application
    Filed: June 26, 2018
    Publication date: January 3, 2019
    Inventors: Vinh Ho, Magathi Jayaram Willis, Keith Troung, Hamid Ghezelayagh