Patents by Inventor Magesh Valliappan

Magesh Valliappan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100135442
    Abstract: An apparatus and method is disclosed to compensate for one or more offsets in a communications signal. A communications receiver may carry out an offset adjustment algorithm to compensate for the one or more offsets. An initial search procedure determines one or more signal metric maps for one or more selected offset adjustment corrections from the one or more offset adjustment corrections. The offset adjustment algorithm determines one or more optimal points for one or more selected offset adjustment correction based upon the one or more signal maps. The adaptive offset algorithm adjusts each of the one or more selected offset adjustment corrections to their respective optimal points and/or each of one or more non-selected offset adjustment corrections to a corresponding one of a plurality of possible offset corrections to provide one or more adjusted offset adjustment corrections. A tracking mode procedure optimizes the one or more adjusted offset adjustment corrections.
    Type: Application
    Filed: December 3, 2008
    Publication date: June 3, 2010
    Applicant: Broadcom Corporation
    Inventors: Namik Kemal Kocaman, Afshin Momtaz, Velu Chellam Pillai, Vivek Telang, Sundararajan Chidambara, Magesh Valliappan
  • Publication number: 20080082896
    Abstract: According to an example embodiment, a method may include determining an actual location (N) of a burst error in a data block; selecting a burst error pattern that is a correctable error based on adjusting an error pattern syndrome by an adjustment amount (S); and determining a correction vector based on the burst error pattern; shifting the correction vector by an offset amount based on (N) and (S); and correcting the burst error in the data block based on the shifted correction vector.
    Type: Application
    Filed: August 17, 2007
    Publication date: April 3, 2008
    Applicant: Broadcom Corporation
    Inventors: Magesh Valliappan, Velu Pillai
  • Patent number: 7340662
    Abstract: GBit/s transceiver with built-in self test features. A method is disclosed for testing the operation of a transceiver having a digital processing section and an analog section, each having a transmit portion and a receive portion, the analog portions adaptable to interface with an analog network. The transceiver is first configured to operate in a test mode. In the test mode, the transmit portion of the digital processing section is activated to generate data to be transmitted by the transmit portion of the analog section. The receive portion of the analog section and the receive portion of the digital processing section are operated to receive data. Thereafter, the parametrics of select portions of the receive portion of the digital processing section are examined during the receipt of data by the receive portion of the analog section and processing thereof by the receive portion of the digital processing section.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: March 4, 2008
    Inventors: James Francis McElwee, Eric Kimball, John James Paulos, Magesh Valliappan
  • Publication number: 20080052597
    Abstract: According to an example embodiment, an apparatus may include logic. The apparatus may be configured to: determine, based on an error location polynomial, an error location syndrome corresponding to an actual location of a burst error in a data block; select a burst error pattern that is less than or equal to M bits, and having no more than Y consecutive zeros within the burst error, where M is greater than the order of the error location polynomial; determine an error pattern syndrome based on the selected burst error pattern and the error location polynomial; and determine an actual location of the burst error in the data block based on the error location syndrome and the error pattern syndrome.
    Type: Application
    Filed: August 17, 2007
    Publication date: February 28, 2008
    Applicant: BROADCOM CORPORATION
    Inventors: Magesh Valliappan, Velu Pillai
  • Publication number: 20070274379
    Abstract: Various embodiments are disclosed relating to crosstalk emission management. In an example embodiment, an amplitude of a main tap of a transmit equalizer may be determined to limit crosstalk emitted from a local channel to one or more other channels to be less than a threshold. A ratio of an amplitude of at least one secondary tap of the transmit equalizer to the amplitude of the main tap may be determined to provide equalization to the local channel.
    Type: Application
    Filed: May 1, 2007
    Publication date: November 29, 2007
    Inventors: Magesh Valliappan, Howard Baumer, Anthony Brewster, Vivek Telang