Patents by Inventor Mahadevan Krishna Iyer

Mahadevan Krishna Iyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7977758
    Abstract: Disclosed are ferroelectric and ferromagnetic noise isolation structures that reduce electromagnetic interference and noise in integrated circuit devices and system architectures. Representative structures comprise two or more devices that are vertically disposed relative to one another, and a thin ferroelectric or ferromagnetic film layer disposed between the respective devices that isolates electromagnetic energy coupling from one device to another.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: July 12, 2011
    Assignee: Georgia Tech Research Corporation
    Inventors: Markondeya Raj Pulugurtha, Madhaven Swaminathan, Mahadevan Krishna Iyer, Rao Tummala, Isaac Robin Abothu, Jin Hyun Hwang
  • Publication number: 20100170086
    Abstract: A magnetically-assisted chip assembly unit for assembling at least one chip having a mounting surface and an attachment surface, wherein the attachment surface supports a magnetisable layer thereon and opposes said mounting surface, onto a substrate that has a corresponding chip mounting surface. The unit comprises a template wafer having at least one recess adapted to accommodate therein said chip; and a master wafer having at least one magnetisable element; wherein the template wafer is mounted on the master wafer and said magnetisable element is located at least proximate to the at least one recess such that the magnetisable element is capable of manipulating the chip into the recess, via its magnetisable layer when the magnetisable element is magnetized and generates a magnetic field. Once in the recess, the attachment surface of the chip faces at least a portion of the recess and the mounting surface of the chip faces an opening of the recess.
    Type: Application
    Filed: November 3, 2006
    Publication date: July 8, 2010
    Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
    Inventors: Qasem Ramadan, Seung Uk Yoon, Vaidyanathan Kripesh, Poi Siong Teo, Mahadevan Krishna Iyer
  • Publication number: 20100103639
    Abstract: Disclosed are ferroelectric and ferromagnetic noise isolation structures that reduce electromagnetic interference and noise in integrated circuit devices and system architectures. Representative structures comprise two or more devices that are vertically disposed relative to one another, and a thin ferroelectric or ferromagnetic film layer disposed between the respective devices that isolates electromagnetic energy coupling from one device to another.
    Type: Application
    Filed: June 20, 2008
    Publication date: April 29, 2010
    Inventors: Markondeya Raj Pulugurtha, Jin Hyun Hwang, Isaac Robin Abothu, Mahadevan Krishna Iyer, Rao Tummala, Madhavan Swaminathan
  • Patent number: 7189594
    Abstract: A wafer level package formed on an integrated circuit chip having bondpads and a fabrication method therefor is disclosed. The wafer level package comprises at least one first, second and third separation layer having at least one first and second conductive layer formed in-between the separation layers. The at least one first conductive layer is formed on the at least one first separation layer and is coupled to the bondpads. The at least one second conductive layer is formed on the at last one second separation layer wherein the at least one second conductive layer is electrically coupled to the at least one first conductive layer. The at least one third separation layer allows solder to be attached to the at least one second conductive layer for electrically coupling the solder to the bondpads. A chip ground plane is laid in the integrated circuit chip for providing a ground to the at least one first conductive layer and the solder.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: March 13, 2007
    Assignee: Agency for Science, Technology and Research
    Inventors: Vaidyanathan Kripesh, Wai Kwan Wong, Mihai Dragos Rotaru, Tai Chong Chai, Mahadevan Krishna Iyer
  • Patent number: 7178711
    Abstract: A method and device to elongate a solder joint are provided. The method begins by forming an elongator on a first substrate. The elongator comprises an expander and an encapsulant to encapsulate the expander. A solder joint is formed to connect the first substrate to a second substrate. Thereafter, the encapsulant is softened to release the expander from a compressed state to elongate the solder joint. The device to elongate a solder joint comprises a substrate having an elongator formed on it. The elongator includes an expander in a compressed state and an encapsulant to encapsulate the expander.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: February 20, 2007
    Assignees: Agency for Science, Technology and Research, National Univeristy of Singapore, Georgia Tech Research Corporation
    Inventors: Ee Hua Wong, Ranjan Rajoo, Wai Kwan Wong, Mahadevan Krishna Iyer
  • Patent number: 6879287
    Abstract: A high radiation efficiency antenna system in a package is achieved by the provision of a Dielectric Resonator Package. A Dielectric resonator package comprises a dielectric body of the package forming a dielectric resonator that resonates at radio frequency and a feed substrate having an upper and a lower surface, a feed structure formed on the upper surface of the feed substrate, and RF circuitry mounted on the lower surface of the feed substrate. The feed substrate is attached to the dielectric body of the package from the side of the feed structure.
    Type: Grant
    Filed: May 24, 2003
    Date of Patent: April 12, 2005
    Assignee: Agency for Science, Technology and Research
    Inventors: Alexander Pavlovich Popov, Mihai Dragos Rotaru, Mahadevan Krishna Iyer
  • Publication number: 20040233107
    Abstract: A high radiation efficiency antenna system in a package is achieved by the provision of a Dielectric Resonator Package. A Dielectric resonator package comprises a dielectric body of the package forming a dielectric resonator that resonates at radio frequency and a feed substrate having an upper and a lower surface, a feed structure formed on the upper surface of the feed substrate, and RF circuitry mounted on the lower surface of the feed substrate. The feed substrate is attached to the dielectric body of the package from the side of the feed structure.
    Type: Application
    Filed: May 24, 2003
    Publication date: November 25, 2004
    Inventors: Alexander Pavlovich Popov, Mihai Dragos Rotaru, Mahadevan Krishna Iyer