Patents by Inventor Mahendra Singh Khalsa

Mahendra Singh Khalsa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Congestion aware block placement
    Patent number: 8239797
    Abstract: A circuit design process is presented that includes a block placement operation, followed by global routing based upon the initial placement of the blocks. Congestion data is generated from the global routing and, in an automated process, the blocks are placed again based upon the congestion data to reduce the routing congestion of the design. This can be used as part of a custom layout design process, for example.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: August 7, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Sanjib Ghosh, Vandana Gupta, Hitesh Marwah, Mahendra Singh Khalsa, Pawan Fangaria
  • Congestion aware pin optimizer
    Patent number: 7971174
    Abstract: A circuit design process for the reduction of routing congestion is described. This process includes a block placement operation, an initial pin optimization for the block placement, and global routing based upon the initial pin optimization. Congestion data is generated from the global routing and, in an automated process, the pins are re-optimized, based upon the congestion data. This process can be used as part of a custom layout design process, for example.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: June 28, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Mahendra Singh Khalsa, Sanjib Ghosh, Vandana Gupta, Hitesh Marwah, Pawan Fangaria