Patents by Inventor Maher J. Hamdan

Maher J. Hamdan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Transistor structure with depletion-mode and enhancement mode-devices
    Patent number: 10868165
    Abstract: A gallium nitride transistor includes a substrate on which a source region, a drain region, a drift region and a gate region are defined. The drift region extends between the source region and the drain region. The gate region includes a combination of enhancement-mode and depletion-mode devices that are positioned across the drift region and are used together to control charge density and mobility of electrons in the drift region with a relatively low threshold voltage (Vth). Enhancement-mode devices are formed using a P-type layer disposed on the substrate and coupled to a gate electrode.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 15, 2020
    Assignee: NAVITAS SEMICONDUCTOR LIMITED
    Inventors: Pil Sung Park, Maher J. Hamdan, Santosh Sharma, Daniel M. Kinzer
  • Gallium nitride transistor with improved termination structure
    Patent number: 10847644
    Abstract: A gallium nitride transistor includes one or more P-type hole injection structures that are positioned between the gate and the drain. The P-type hole injection structures are configured to inject holes in the transistor channel to combine with trapped carriers (e.g., electrons) so the electrical conductivity of the channel is less susceptible to previous voltage potentials applied to the transistor.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: November 24, 2020
    Assignee: NAVITAS SEMICONDUCTOR LIMITED
    Inventors: Daniel M. Kinzer, Maher J. Hamdan
  • GALLIUM NITRIDE TRANSISTOR STRUCTURE
    Publication number: 20190326426
    Abstract: A gallium nitride transistor includes a substrate on which a source region, a drain region, a drift region and a gate region are defined. The drift region extends between the source region and the drain region. The gate region includes a combination of enhancement-mode and depletion-mode devices that are positioned across the drift region and are used together to control charge density and mobility of electrons in the drift region with a relatively low threshold voltage (Vth). Enhancement-mode devices are formed using a P-type layer disposed on the substrate and coupled to a gate electrode.
    Type: Application
    Filed: April 23, 2019
    Publication date: October 24, 2019
    Applicant: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Pil Sung Park, Maher J. Hamdan, Santosh Sharma, Daniel M. Kinzer
  • GALLIUM NITRIDE TRANSISTOR WITH IMPROVED TERMINATION STRUCTURE
    Publication number: 20190326427
    Abstract: A gallium nitride transistor includes one or more P-type hole injection structures that are positioned between the gate and the drain. The P-type hole injection structures are configured to inject holes in the transistor channel to combine with trapped carriers (e.g., electrons) so the electrical conductivity of the channel is less susceptible to previous voltage potentials applied to the transistor.
    Type: Application
    Filed: April 23, 2019
    Publication date: October 24, 2019
    Applicant: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Daniel M. Kinzer, Maher J. Hamdan