Patents by Inventor Mahesh Poolakkaparambil

Mahesh Poolakkaparambil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9645886
    Abstract: Error-correcting circuit includes: component generating a first output from first and second inputs; error detector generating an error flag indicative of whether or not an error is detected in the first output, based on the first output, and the first and second inputs; correction generator generating a correcting output after a first time period beginning with a timing event, based on the first output, and the first and second inputs; and output generator generating an output after a second time period beginning with the timing event. If the error flag indicates a detected error then the second time period may be longer than the first time period, otherwise it may be not longer, and the error-correcting circuit output may include a combination of the first output and the correcting output whereby the detected error is corrected, otherwise the error-correcting circuit output may correspond directly to the first output.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: May 9, 2017
    Assignee: Oxford Brookes University
    Inventors: Mahesh Poolakkaparambil, Abusaleh Jabir, Jimson Mathew, Dhiraj K. Pradhan
  • Publication number: 20140229786
    Abstract: An error-correcting circuit comprises: a component arranged to generate a first output from a first input and a second input; an error detector arranged to generate an error flag indicative of whether or not it has detected an error in the first output, based on the first output, the first input and the second input; a correction generator suitable for generating a correcting output after a first time period beginning with a timing event, based on the first output, the first input and the second input; and an output generator arranged to generate an output of the error-correcting circuit after a second time period beginning with the timing event. If the error flag indicates that an error has been detected in the first output then the second time period may be longer than the first time period, otherwise the second time period may be not longer than the first time period.
    Type: Application
    Filed: August 10, 2012
    Publication date: August 14, 2014
    Applicant: OXFORD BROOKES UNIVERSITY
    Inventors: Mahesh Poolakkaparambil, Abusaleh Jabir, Jimson Mathew, Dhiraj K. Pradhan