Patents by Inventor Mahesh S. Natu

Mahesh S. Natu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110154006
    Abstract: Memory channel training parameters are function of electrical characteristics of memory devices, processor(s) and memory channel(s). Training steps can be skipped if the BIOS can determine that the memory devices, motherboard and processor have not changed since the last boot. Memory devices contain a serial number for tracking purposes and most motherboards contain a serial number. Many processors do not provide a mechanism by which the BIOS can track the processor. Described herein are techniques that allow the BIOS to track a processor and detect a swap without violating privacy/security requirements.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Inventors: MAHESH S. NATU, John V. Lovelace, Rajesh P. Banginwar
  • Publication number: 20110154104
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Application
    Filed: December 23, 2009
    Publication date: June 23, 2011
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Publication number: 20110055469
    Abstract: In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 3, 2011
    Inventors: Mahesh S. Natu, Thanunathan Rangarajan, Gautam B. Doshi, Shammanna M. Datta, Baskaran Ganesan, Mohan J. Kumar, Rajesh S. Parthasarathy, Frank Binns, Rajesh Nagaraja Murthy, Robert C. Swanson
  • Publication number: 20100169729
    Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for enabling an integrated memory controller to transparently work with defective memory devices. In some embodiments, a marginal condition is imposed on a memory module during normal operations of the memory module. The term “marginal condition” refers to a condition that is out of compliance with a specified (or “normal”) operating condition for the memory module. The memory module may exhibit failures in response to the marginal conditions and compensating mechanisms may mitigate the failures.
    Type: Application
    Filed: December 30, 2008
    Publication date: July 1, 2010
    Inventors: SHAMANNA M. DATTA, JAMES W. ALEXANDER, MAHESH S. NATU, RAHUL KHANNA, MOHAN J. KUMAR
  • Publication number: 20090172806
    Abstract: Multi-node and multi-processor security management is described in this application. Data may be secured in a TPM of any one of a plurality of nodes, each node including one or more processors. The secured data may be protected using hardware hooks to prevent unauthorized access to the secured information. Security hierarchy may be put in place to protect certain memory addresses from access by requiring permission by VMM, OS, ACM or processor hardware. The presence of secured data may be communicated to each of the nodes to ensure that data is protected. Other embodiments are described.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Inventors: Mahesh S. Natu, Sham Datta
  • Patent number: 7539854
    Abstract: An embodiment of the present invention is a system and method relating to seamlessly enable enhanced management and scripting of a computer system and its add-in devices. In at least one embodiment, the present invention enables a system administrator or integrator to script a common configuration for multiple devices and then automatically configure the devices using the script. The language construct and central data repository for configuration settings are extended to comprehend a scripting language. A script is read by a script engine during either pre-boot or runtime. The script engine searches a keyword database on the central data repository to determine requested configuration settings. A data offset is corresponding to a specific op-code is used to determine where configuration settings are located, for modification.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: May 26, 2009
    Assignee: Intel Corporation
    Inventors: Michael A. Rothman, Robert P. Hale, Andrew J. Fish, Vincent J. Zimmer, Mahesh S. Natu
  • Publication number: 20090089566
    Abstract: Systems and methods for enabling Reliability, Availability & Serviceability features after launching a secure environment under the control of LaGrande Technology (LT), or comparable security technology, without compromising security are provided. In one embodiment, the method comprises adding at least one specific capability to a processor to enable at least one of CPU hot-plug, CPU migration, CPU hot removal and capacity on demand.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Mahesh S. Natu, Sham Datta, Jeff Wiedemeier, James R. Vash, Sailesh Kottapalli, Scott P. Bobholz, Allen Baum
  • Patent number: 7512778
    Abstract: A method for using an operating system device for non-operating system uses. A false event signal is generated to indicate that a device should be shut down. After this is accomplished, the device is used for a different purpose while the operating system thinks it is inoperative. Once the other use is completed, another false event signal is generated so that the device is activated again and returned to use in the operating system in normal fashion.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: March 31, 2009
    Assignee: Intel Corporation
    Inventor: Mahesh S. Natu
  • Publication number: 20080177854
    Abstract: A technique for providing communication between two computers through a network in a way to allow one computer to control the other.
    Type: Application
    Filed: March 24, 2008
    Publication date: July 24, 2008
    Inventors: Rahul Khanna, Mahesh S. Natu
  • Patent number: 7305668
    Abstract: A secure method for updating computer firmware online is described. The firmware storage locations are write protected prior to loading the operating system. Updating the firmware after loading the operating system helps to reduce downtime.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: December 4, 2007
    Assignee: Intel Corporation
    Inventors: Barry Kennedy, Mahesh S. Natu, John V. Lovelace, Andrew Fish, Sharif S. Faraq
  • Patent number: 7246224
    Abstract: An embodiment of the present invention relates generally to computer configuration and, more specifically, to a system and method to seamlessly determine the component configurations of a series of heterogeneous platforms and enable their respective component configurations to be intelligently migrated from one platform to another. In some embodiments, the invention involves generating configuration binaries for a plurality of target platforms. The configuration binaries are used with tools to create configuration directives for the target machines. In at least one embodiment, the configuration directives are sent to the target platforms in a scripting language. In some embodiments, the scripts are automatically generated by a tool using the configuration binaries for various platforms and policy guidance to determine which settings should be set on or off. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: July 17, 2007
    Assignee: Intel Corporation
    Inventors: Michael A. Rothman, Robert P. Hale, John P. Lambino, Mahesh S. Natu, Vincent J. Zimmer, Mohan J. Kumar
  • Patent number: 7240187
    Abstract: Disclosed is a method, apparatus, and system in which a basic input/output BIOS is run and a non-volatile memory coupled to the BIOS is read. The BIOS determines if legacy partition address data is not present for a disk partition identified in the non-volatile memory, and if legacy partition address data is not present for the disk partition, legacy partition address data may be obtained by a legacy OPROM. The disk drive may then be updated with the legacy partition address data.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: July 3, 2007
    Assignee: Intel Corporation
    Inventor: Mahesh S. Natu
  • Patent number: 7203767
    Abstract: A technique for providing communication between two computers through a network in a way to allow one computer to control the other.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: April 10, 2007
    Assignee: Intel Corporation
    Inventors: Rahul Khanna, Mahesh S. Natu
  • Patent number: 7117353
    Abstract: Methods and apparatus to enable console redirection in a multiple execution environment are disclosed. In an example method, at least one periodic interrupt in a first basic input/output system (BIOS) execution environment of a local console is initiated. Data associated with a second BIOS execution environment of the local console is retrieved. The data associated with the second BIOS execution environment is communicated to a remote terminal.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: October 3, 2006
    Assignee: Intel Corporation
    Inventors: Mahesh S. Natu, Rahul Khanna
  • Patent number: 7103767
    Abstract: Disclosed is a method, apparatus, and system in which a basic input/output BIOS is run and a non-volatile memory coupled to the BIOS is read. The BIOS determines if legacy partition address data is not present for a disk partition identified in the non-volatile memory, and if legacy partition address data is not present for the disk partition, the BIOS causes the execution of a Legacy OPROM. The execution of the Legacy OPROM causes legacy partition address data for the disk partition that does not have associated legacy partition address data to be obtained. The non-volatile memory as well as the disk drive is updated with the legacy partition address data.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: September 5, 2006
    Assignee: Intel Corporation
    Inventor: Mahesh S. Natu
  • Patent number: 7080244
    Abstract: A system and method for configuring devices during pre-boot in a computer system which may have both legacy and EFI compatible option-ROMs. EFI versions of the Option-ROMs export a callable interface that can be invoked to execute the configuration utility. A hardware independent piece of software lists all the hardware devices in a single menu and allows the user to invoke the configuration utility for the appropriate hardware device(s).
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: July 18, 2006
    Assignee: Intel Corporation
    Inventors: Mahesh S. Natu, Michael A. Rothman
  • Patent number: 6999995
    Abstract: A technique for providing communication between two computers through a network in a way to allow one computer to control the other.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: February 14, 2006
    Assignee: Intel Corporation
    Inventors: Rahul Khanna, Mahesh S. Natu
  • Patent number: 6954851
    Abstract: A method for using an operating system device for non-operating system uses. A false event signal is generated to indicate that a device should be shut down. After this is accomplished, the device is used for a different purpose while the operating system thinks it is inoperative. Once the other use is completed, another false event signal is generated so that the device is activated again and returned to use in the operating system in normal fashion.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: October 11, 2005
    Assignee: Intel Corporation
    Inventor: Mahesh S. Natu
  • Patent number: 6910113
    Abstract: A processor-based system includes a system firmware program (e.g., the system basic input/output system (BIOS)) to execute a device firmware program (e.g., a device driver) stored on a storage device (e.g., an expansion read-only-memory (ROM)). For execution, the processor-based system uses a system memory including a designated region intended for storing the device firmware program. The system firmware program determines whether the device firmware program exceeds the capacity of the designated region. And, if so, the system firmware program stores the device firmware program in the designated region and at least one another location in the system memory thus supporting larger expansion ROMs on some platforms.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: June 21, 2005
    Assignee: Intel Corporation
    Inventor: Mahesh S. Natu
  • Publication number: 20040193738
    Abstract: A system and method for configuring devices during pre-boot in a computer system which may have both legacy and EFI compatible option-ROMs. EFI versions of the Option-ROMs export a callable interface that can be invoked to execute the configuration utility. A hardware independent piece of software lists all the hardware devices in a single menu and allows the user to invoke the configuration utility for the appropriate hardware device(s).
    Type: Application
    Filed: September 10, 2003
    Publication date: September 30, 2004
    Inventors: Mahesh S. Natu, Michael A. Rothman