Abstract: A chip-like network resistor is disclosed which is reduced in variation in resistance of terminal electrodes. A substrate (1) is formed on both ends (3, 5) with a plurality of recesses (7), at each of which a terminal electrode (17) connected to a thick-film electrode (9) is arranged. The terminal electrodes (17) each are constituted of a thin metal film electrode layer (19) and two plated layers (21, 23). The thin metal film electrode layer (19) includes a front surface electrode section (19a) formed on a front surface (1a) of the substrate (1) so as to overlap with the thick-film electrode (9), a side surface electrode section (19b) connected to the front surface electrode section (19a) and arranged so as to entirely cover an inner surface of the recess (7) and a rear surface electrode section (19c) formed on a rear surface (1b) of the substrate (1) and connected to the side surface electrode section (19b).