Patents by Inventor Mahmoud A. Mousa
Mahmoud A. Mousa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8815654Abstract: A Silicon on Insulator (SOI) Integrated Circuit (IC) chip with devices such as a vertical Silicon Controlled Rectifier (SCR), vertical bipolar transistors, a vertical capacitor, a resistor and/or a vertical pinch resistor and method of making the device(s). The devices are formed in a seed hole through the SOI surface layer and insulator layer to the substrate. A buried diffusion, e.g., N-type, is formed through the seed hole in the substrate. A doped epitaxial layer is formed on the buried diffusion and may include multiple doped layers, e.g., a P-type layer and an N-type layer. Polysilicon, e.g., P-type, may be formed on the doped epitaxial layer. Contacts to the buried diffusion are formed in a contact liner.Type: GrantFiled: June 14, 2007Date of Patent: August 26, 2014Assignee: International Business Machines CorporationInventors: Robert J. Gauthier, Jr., Junjun Li, Souvick Mitra, Mahmoud A Mousa, Christopher S. Putnam
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Patent number: 8390068Abstract: A silicon control rectifier and an electrostatic discharge protection device of an integrated circuit including the silicon control rectifier. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: GrantFiled: January 30, 2012Date of Patent: March 5, 2013Assignee: International Business Machines CorporationInventors: Robert J. Gauthier, Jr., Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher Stephen Putnam
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Publication number: 20120119257Abstract: A silicon control rectifier and an electrostatic discharge protection device of an integrated circuit including the silicon control rectifier. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: ApplicationFiled: January 30, 2012Publication date: May 17, 2012Applicant: International Business Machines CorporationInventors: Robert J. Gauthier, JR., Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher Stephen Putnam
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Patent number: 8138546Abstract: A silicon control rectifier and an electrostatic discharge protection device of an integrated circuit including the silicon control rectifier. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: GrantFiled: May 28, 2008Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: Robert J. Gauthier, Jr., Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher Stephen Putnam
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Patent number: 7863117Abstract: An apparatus and method for a multilayer silicon over insulator (SOI) device is provided. In the multilayer SOI device, the crystal orientation of at least one active region of a device is different than the active region of at least another device. Where the multilayer SOI device has a first layer including a PMOS device with a silicon active region having a crystal orientation of [100], the second layer may be an NMOS device with a active region having a silicon layer having a crystal orientation of [110]. The second layer is bonded to the first layer. The method and apparatus can be extended to more than two layers thus forming a multilayer SOI device having a different crystal orientation at each layer. The multiple layer SOI device may form circuits of reduced surface area.Type: GrantFiled: December 20, 2007Date of Patent: January 4, 2011Assignee: International Business Machines CorporationInventors: Mahmoud A. Mousa, Christopher S. Putnam
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Patent number: 7547917Abstract: An apparatus and method for an inverted multilayer silicon over insulator (SOI) device is provided. In the multilayer SOI device, the crystal orientation of at least one active region of a device may be different than the active region of at least another device. Where the multilayer SOI device has a first layer including a PMOS device with a silicon active region having a crystal orientation of [100], the second layer may be an NMOS device with an active region having a silicon layer having a crystal orientation of [110]. The second layer is bonded to the first layer. The method and apparatus can be extended to more than two layers thus forming a multilayer SOI device having a different crystal orientation at each layer. The multiple layer SOI device may form circuits of reduced surface area.Type: GrantFiled: April 6, 2005Date of Patent: June 16, 2009Assignee: International Business Machines CorporationInventors: Robert J. Gauthier, Jr., Mahmoud A. Mousa, Christopher S. Putnam
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Publication number: 20080308837Abstract: A Silicon on Insulator (SOI) Integrated Circuit (IC) chip with devices such as a vertical Silicon Controlled Rectifier (SCR), vertical bipolar transistors, a vertical capacitor, a resistor and/or a vertical pinch resistor and method of making the device(s). The devices are formed in a seed hole through the SOI surface layer and insulator layer to the substrate. A buried diffusion, e.g., N-type, is formed through the seed hole in the substrate. A doped epitaxial layer is formed on the buried diffusion and may include multiple doped layers, e.g., a P-type layer and an N-type layer. Polysilicon, e.g., P-type, may be formed on the doped epitaxial layer. Contacts to the buried diffusion are formed in a contact liner.Type: ApplicationFiled: June 14, 2007Publication date: December 18, 2008Inventors: Robert J. Gauthier, JR., Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher S. Putnam
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Patent number: 7457086Abstract: Method and device for protecting against electrostatic discharge. The method includes configuring a gate of at least one upper transistor of a transistor network connected between power rails to be biased to a prescribed value, and coupling an electrostatic discharge event to a gate of a lower transistor of the transistor network. The at least one upper and at least one lower transistors of the transistor network are respectively coupled between the power rails from a higher voltage to a lower voltage.Type: GrantFiled: December 21, 2006Date of Patent: November 25, 2008Assignee: International Business Machines CorporationInventors: Kiran V. Chatty, Robert J. Gauthier, Jr., Mahmoud A. Mousa, Mujahid Muhammad, Christopher S. Putnam
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Publication number: 20080224172Abstract: A silicon control rectifier and an electrostatic discharge protection device of an integrated circuit including the silicon control rectifier. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: ApplicationFiled: May 28, 2008Publication date: September 18, 2008Inventors: Robert J. Gauthier, Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher Stephen Putnam
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Patent number: 7399665Abstract: A silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an integrated circuit. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: GrantFiled: July 23, 2007Date of Patent: July 15, 2008Assignee: International Business Machines CorporationInventors: Robert J. Gauthier, Jr., Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher Stephen Putnam
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Publication number: 20080145993Abstract: A silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an integrated circuit. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: ApplicationFiled: February 25, 2008Publication date: June 19, 2008Inventors: Robert J. Gauthier, Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher Stephen Putnam
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Publication number: 20080108185Abstract: An apparatus and method for a multilayer silicon over insulator (SOI) device is provided. In the multilayer SOI device, the crystal orientation of at least one active region of a device is different than the active region of at least another device. Where the multilayer SOI device has a first layer including a PMOS device with a silicon active region having a crystal orientation of [100], the second layer may be an NMOS device with a active region having a silicon layer having a crystal orientation of [110]. The second layer is bonded to the first layer. The method and apparatus can be extended to more than two layers thus forming a multilayer SOI device having a different crystal orientation at each layer. The multiple layer SOI device may form circuits of reduced surface area.Type: ApplicationFiled: December 20, 2007Publication date: May 8, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mahmoud Mousa, Christopher Putnam
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Patent number: 7348658Abstract: An apparatus and method for a multilayer silicon over insulator (SOI) device is provided. In the multilayer SOI device, the crystal orientation of at least one active region of a device is different than the active region of at least another device. Where the multilayer SOI device has a first layer including a PMOS device with a silicon active region having a crystal orientation of [100], the second layer may be an NMOS device with a active region having a silicon layer having a crystal orientation of [110]. The second layer is bonded to the first layer. The method and apparatus can be extended to more than two layers thus forming a multilayer SOI device having a different crystal orientation at each layer. The multiple layer SOI device may form circuits of reduced surface area.Type: GrantFiled: August 30, 2004Date of Patent: March 25, 2008Assignee: International Business Machines CorporationInventors: Mahmoud A. Mousa, Christopher S. Putnam
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Patent number: 7298008Abstract: Disclosed are a silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an integrated circuit. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: GrantFiled: January 20, 2006Date of Patent: November 20, 2007Assignee: International Business Machines CorporationInventors: Robert J. Gauthier, Jr., Junjun Li, Souvick Mitra, Mahmoud A. Mousa, Christopher Stephen Putnam
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Publication number: 20070262345Abstract: A silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an integrated circuit. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: ApplicationFiled: July 23, 2007Publication date: November 15, 2007Inventors: Robert Gauthier, Junjun Li, Souvick Mitra, Mahmoud Mousa, Christopher Putnam
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Publication number: 20070170512Abstract: Disclosed are a silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an integrated circuit. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with a buried oxide layer of a silicon-on-insulator substrate, a top surface of the silicon layer defining a horizontal plane; and an anode of the silicon control rectifier formed in a first region of the silicon body and a cathode of the silicon control rectifier formed in an opposite second region of the silicon body, wherein a path of current flow between the anode and the cathode is only in a single horizontal direction parallel to the horizontal plane.Type: ApplicationFiled: January 20, 2006Publication date: July 26, 2007Inventors: Robert Gauthier, Jr., Junjun Li, Souvick Mitra, Mahmoud Mousa, Christopher Putnam
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Publication number: 20070097570Abstract: Method and device for protecting against electrostatic discharge. The method includes configuring a gate of at least one upper transistor of a transistor network connected between power rails to be biased to a prescribed value, and coupling an electrostatic discharge event to a gate of a lower transistor of the transistor network. The at least one upper and at least one lower transistors of the transistor network are respectively coupled between the power rails from a higher voltage to a lower voltage.Type: ApplicationFiled: December 21, 2006Publication date: May 3, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kiran CHATTY, Robert GAUTHIER, Mahmoud MOUSA, Mujahid MUHAMMAD, Christopher PUTNAM
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Patent number: 7203045Abstract: A structure and apparatus is provided for an electrostatic discharge power clamp, for use with high voltage power supplies. The power clamp includes a network of transistor devices, for example, nFETs arranged in series between a power rail and a ground rail. The first transistor device is biased into a partially on-state, and thus, neither device sees the full voltage potential between the power rail and the ground rail. Accordingly, the power clamp can function in voltage environments higher than the native voltage of the transistor devices. Additionally, the second transistor device is controlled by an RC network functioning as a trigger which allows the second transistor device to turn on during a voltage spike such as occurs during an ESD event. The capacitor of the RC network may be small thereby requiring small real estate on the integrated circuit. The clamp may have fast turn-on times as well as conducting current for long periods of time after turning on.Type: GrantFiled: October 1, 2004Date of Patent: April 10, 2007Assignee: International Business Machines CorporationInventors: Kiran V. Chatty, Robert J. Gauthier, Jr., Mahmoud A. Mousa, Mujahid Muhammad, Christopher S. Putnam
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Publication number: 20060226491Abstract: An apparatus and method for an inverted multilayer silicon over insulator (SOI) device is provided. In the multilayer SOI device, the crystal orientation of at least one active region of a device may be different than the active region of at least another device. Where the multilayer SOI device has a first layer including a PMOS device with a silicon active region having a crystal orientation of [100], the second layer may be an NMOS device with an active region having a silicon layer having a crystal orientation of [110]. The second layer is bonded to the first layer. The method and apparatus can be extended to more than two layers thus forming a multilayer SOI device having a different crystal orientation at each layer. The multiple layer SOI device may form circuits of reduced surface area.Type: ApplicationFiled: April 6, 2005Publication date: October 12, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert Gauthier, Mahmoud Mousa, Christopher Putnam
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Publication number: 20060072267Abstract: A structure and apparatus is provided for an electrostatic discharge power clamp, for use with high voltage power supplies. The power clamp includes a network of transistor devices, for example, nFETs arranged in series between a power rail and a ground rail. The first transistor device is biased into a partially on-state, and thus, neither device sees the full voltage potential between the power rail and the ground rail. Accordingly, the power clamp can function in voltage environments higher than the native voltage of the transistor devices. Additionally, the second transistor device is controlled by an RC network functioning as a trigger which allows the second transistor device to turn on during a voltage spike such as occurs during an ESD event. The capacitor of the RC network may be small thereby requiring small real estate on the integrated circuit. The clamp may have fast turn-on times as well as conducting current for long periods of time after turning on.Type: ApplicationFiled: October 1, 2004Publication date: April 6, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kiran Chatty, Robert Gauthier, Mahmoud Mousa, Mujahid Muhammad, Christopher Putnam