Abstract: A power converter for providing power to a load includes a buck converter having a DC input and a DC output and that is configured to receive a DC voltage at the DC voltage input and provide DC output voltage at the DC output. The converter also includes a voltage monitor that monitors a voltage provided at the DC output and a selectively connectable transient suppression circuit connected across that DC output and connected to the voltage monitor. The selectively connectable transient suppression circuit includes a dissipation circuit and a suppression circuit switch connected in series with the dissipation circuit that controls charge dissipation from the DC output into the dissipation circuit based on the voltage monitor determining that the voltage across the DC output is above a threshold.

Abstract: A motor drive system includes a MUX circuit, a DC voltage scaling circuit, a fault detection circuit, an ADC, and an FPGA. The MUX circuit selectively establishes a MUX input signal path and a MUX output signal path. The DC voltage scaling circuit measures a DC link voltage. The fault detection circuit receives the output DC link voltage and outputs one of a normal operation signal or a fault signal in response to comparing the DC link voltage to one or both of a U/V reference voltage and an O/V reference voltage. The ADC converts one or more input analog voltages into respective corresponding output digital voltages. The FPGA is in signal communication with the ADC output (ADCOUT) and the MUX circuit, and is configured to control the motor drive system based on a comparison between one or more of the output digital voltages.

Abstract: A motor drive system includes a MUX circuit, a DC voltage scaling circuit, a fault detection circuit, an ADC, and an FPGA. The MUX circuit selectively establishes a MUX input signal path and a MUX output signal path. The DC voltage scaling circuit measures a DC link voltage. The fault detection circuit receives the output DC link voltage and outputs one of a normal operation signal or a fault signal in response to comparing the DC link voltage to one or both of a U/V reference voltage and an O/V reference voltage. The ADC converts one or more input analog voltages into respective corresponding output digital voltages. The FPGA is in signal communication with the ADC output (ADCOUT) and the MUX circuit, and is configured to control the motor drive system based on a comparison between one or more of the output digital voltages.

Abstract: A power converter for providing power to a load includes a buck converter having a DC input and a DC output and that is configured to receive a DC voltage at the DC voltage input and provide DC output voltage at the DC output. The converter also includes a voltage monitor that monitors a voltage provided at the DC output and a selectively connectable transient suppression circuit connected across that DC output and connected to the voltage monitor. The selectively connectable transient suppression circuit includes a dissipation circuit and a suppression circuit switch connected in series with the dissipation circuit that controls charge dissipation from the DC output into the dissipation circuit based on the voltage monitor determining that the voltage across the DC output is above a threshold.