Patents by Inventor Maik Haeberlen

Maik Haeberlen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10283356
    Abstract: Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: May 7, 2019
    Assignee: SILTRONIC AG
    Inventors: Sarad Bahadur Thapa, Maik Haeberlen, Marvin Zoellner, Thomas Schroeder
  • Publication number: 20170372888
    Abstract: Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.
    Type: Application
    Filed: January 15, 2016
    Publication date: December 28, 2017
    Applicant: Siltronic AG
    Inventors: Sarad Bahadur THAPA, Maik HAEBERLEN, Marvin ZOELLNER, Thomas SCHROEDER
  • Patent number: 9828692
    Abstract: An apparatus for producing a single crystal of silicon comprises a plate with a top side, an outer edge, and an inner edge, a central opening adjoining the inner edge, and a tube extending from the central opening to beneath the bottom side of the plate; a device for metering granular silicon onto the plate; a first induction heating coil above the plate, provided for melting of the granular silicon deposited; a second induction heating coil positioned beneath the plate, provided for stabilization of a melt of silicon, the melt being present upon a growing single crystal of silicon. The top side of the plate consists of ceramic material and has elevations, the distance between the elevations in a radial direction being not less than 2 mm and not more than 15 mm.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: November 28, 2017
    Assignee: SILTRONIC AG
    Inventors: Georg Brenninger, Waldemar Stein, Maik Haeberlen
  • Publication number: 20150292109
    Abstract: An apparatus for producing a single crystal of silicon comprises a plate with a top side, an outer edge, and an inner edge, a central opening adjoining the inner edge, and a tube extending from the central opening to beneath the bottom side of the plate; a device for metering granular silicon onto the plate; a first induction heating coil above the plate, provided for melting of the granular silicon deposited; a second induction heating coil positioned beneath the plate, provided for stabilization of a melt of silicon, the melt being present upon a growing single crystal of silicon. The top side of the plate consists of ceramic material and has elevations, the distance between the elevations in a radial direction being not less than 2 mm and not more than 15 mm.
    Type: Application
    Filed: March 27, 2015
    Publication date: October 15, 2015
    Inventors: Georg BRENNINGER, Waldemar STEIN, Maik HAEBERLEN
  • Patent number: 8829532
    Abstract: Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a specific depth below the interface between layer (2) and substrate (1), additionally a layer (4) within the region (3) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer (6) applied to layer (2) and also a defect region (5) comprising dislocations and stacking faults within the layer (4) comprising cavities, the at least one epitaxial layer (6) being largely crack-free, and a residual strain of the at least one epitaxial layer (6) being less than or equal to 1 GPa.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: September 9, 2014
    Assignee: Siltronic AG
    Inventors: Brian Murphy, Maik Häberlen, Jörg Lindner, Bernd Stritzker
  • Patent number: 8492243
    Abstract: Semiconductor structures are produced by providing a 3C—SiC semiconductor layer containing a monocrystalline 3C—SiC layer by implantation of carbon in silicon on a first silicon substrate and applying an epitaxial layer of nitride compound semiconductor suitable for the generation of optoelectronic components onto the 3C—SiC semiconductor layer structure, wherein the epitaxial layer of nitride semiconductor is transferred onto a second substrate by bonding the nitride layer onto the second substrate surface and mechanically or chemically removing silicon and layers containing SiC, the second substrate being a metal with a reflectivity ?80% or being substantially transparent.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: July 23, 2013
    Assignee: Siltronic AG
    Inventors: Maik Haeberlen, Brian Murphy
  • Patent number: 8383495
    Abstract: Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a specific depth below the interface between layer (2) and substrate (1), additionally a layer (4) within the region (3) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer (6) applied to layer (2) and also a defect region (5) comprising dislocations and stacking faults within the layer (4) comprising cavities, the at least one epitaxial layer (6) being largely crack-free, and a residual strain of the at least one epitaxial layer (6) being less than or equal to 1 GPa.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: February 26, 2013
    Assignee: Siltronic AG
    Inventors: Brian Murphy, Maik Haeberlen, Joerg Lindner, Bernd Stritzker
  • Publication number: 20110151650
    Abstract: Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a specific depth below the interface between layer (2) and substrate (1), additionally a layer (4) within the region (3) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer (6) applied to layer (2) and also a defect region (5) comprising dislocations and stacking faults within the layer (4) comprising cavities, the at least one epitaxial layer (6) being largely crack-free, and a residual strain of the at least one epitaxial layer (6) being less than or equal to 1 GPa.
    Type: Application
    Filed: March 2, 2011
    Publication date: June 23, 2011
    Applicant: SILTRONIC AG
    Inventors: Brian Murphy, Maik Häberlen, Jörg Lindner, Bernd Stritzker
  • Publication number: 20100291756
    Abstract: Semiconductor structures are produced by providing a 3C—SiC semiconductor layer containing a monocrystalline 3C—SiC layer by implantation of carbon in silicon on a first silicon substrate and applying an epitaxial layer of nitride compound semiconductor suitable for the generation of optoelectronic components onto the 3C—SiC semiconductor layer structure, wherein the epitaxial layer of nitride semiconductor is transferred onto a second substrate by bonding the nitride layer onto the second substrate surface and mechanically or chemically removing silicon and layers containing SiC, the second substrate being a metal with a reflectivity ?80% or being substantially transparent.
    Type: Application
    Filed: January 21, 2009
    Publication date: November 18, 2010
    Applicant: SILTRONIC AG
    Inventors: Maik Haeberlen, Brian Murphy
  • Publication number: 20060267024
    Abstract: The invention relates to a semiconductor layer structure of a monocrystalline silicon carbide layer on a ?150 mm diameter silicon wafer, the silicon carbide layer having a surface roughness of at most 0.5 nm RMS and a micropipe density of at most 1 cm?2 and being free of defects produced during crystal growth or epitaxial deposition, and to a process for producing such a semiconductor layer structure, by implanting carbon ions into a silicon wafer, heat treating the silicon wafer to produce a buried monocrystalline silicon carbide layer and flanking noncrystalline transition regions, followed by removing the upper silicon layer and noncrystalline transition region above the monocrystalline silicon carbide layer, thus uncovering the monocrystalline silicon carbide layer, and chemical mechanical planarizing the monocrystalline silicon carbide layer to a surface roughness of less than 0.5 nm RMS.
    Type: Application
    Filed: May 22, 2006
    Publication date: November 30, 2006
    Applicant: Siltronic AG
    Inventors: Brian Murphy, Maik Haeberlen, Joerg Lindner