Patents by Inventor Makarand V. Patil

Makarand V. Patil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230016865
    Abstract: A power intent may be loaded on an integrated circuit (IC) design, where the power intent may be represented by a set of constraints. A logic network may be constructed based on the set of constraints and a rule check which is desired to be performed on the power intent. In response to a failure of the rule check, one or more refutation proofs may be created based on the logic network. A subset of the set of constraints may be identified based on the one or more refutation proofs, where the subset of the set of constraints may include an inconsistency which caused the rule check to fail.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 19, 2023
    Applicant: Synopsys, Inc.
    Inventors: Maheshwar Chandrasekar, Brian T. Selden, Makarand V. Patil