Patents by Inventor Makato Kiyama

Makato Kiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130313564
    Abstract: There are provided a semiconductor device that includes a bypass protection unit against surge voltage or the like, achieves good withstand voltage characteristics and low on-resistance (low On-state voltage), has a simple structure, and is used for large-current purpose and a method for producing the semiconductor device. In the present invention, the semiconductor device includes an n+-type GaN substrate 1 having a GaN layer that is in ohmic contact with a supporting substrate, a FET having an n?-type GaN drift layer 2 in a first region R1, and an SBD having an anode electrode in a second region R2, the anode electrode being in Schottky contact with the n?-type GaN drift layer 2. The FET and the SBD are arranged in parallel. A drain electrode D of the FET and a cathode electrode C of the SBD are formed on the back of the n+-type GaN substrate 1.
    Type: Application
    Filed: July 30, 2013
    Publication date: November 28, 2013
    Applicants: Sumitomo Electric Device Innovations, Inc., Sumitomo Electric Industries, Ltd.
    Inventors: Masaya OKADA, Makato KIYAMA, Seiji YAEGASHI, Ken NAKATA
  • Publication number: 20130292695
    Abstract: A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm?2 or less.
    Type: Application
    Filed: July 3, 2013
    Publication date: November 7, 2013
    Inventors: Taku HORII, Tomihito Miyazaki, Makato Kiyama
  • Patent number: 8525184
    Abstract: There are provided a semiconductor device that includes a bypass protection unit against surge voltage or the like, achieves good withstand voltage characteristics and low on-resistance (low On-state voltage), has a simple structure, and is used for large-current purpose and a method for producing the semiconductor device. In the present invention, the semiconductor device includes an n+-type GaN substrate 1 having a GaN layer that is in ohmic contact with a supporting substrate, a FET having an n?-type GaN drift layer 2 in a first region R1, and an SBD having an anode electrode in a second region R2, the anode electrode being in Schottky contact with the d?-type GaN drift layer 2. The FET and the SBD are arranged in parallel. A drain electrode D of the FET and a cathode electrode C of the SBD are formed on the back of the n+-type GaN substrate 1.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: September 3, 2013
    Assignees: Sumitomo Electric Industries, Ltd., Sumitomo Electric Device Innovations, Inc.
    Inventors: Masaya Okada, Makato Kiyama, Seiji Yaegashi, Ken Nakata