Patents by Inventor Makiko Ogiu

Makiko Ogiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reset circuit and integrated circuit including the same
    Patent number: 5644259
    Abstract: A reset circuit includes a plurality of registers (R1-R8) in which a logical value at power on is shifted and set to a predetermined logical value after a predetermined time has elapsed since a power supply was switched on and a logic circuit (1) for outputting a coincidence signal while each of the/plurality of registers is set to the predetermined logic value but outputting a non-coincidence signal while when at least one register is set to a value different from the predetermined logical value. The non-coincidence signal is employed as a reset signal. The plurality of registers are designed to output a value different from the predetermined logic value initially when switching on the power supply. The reset signal can be obtained by even a low power voltage irrespective of a power voltage waveform at the power-on time.
    Type: Grant
    Filed: March 18, 1996
    Date of Patent: July 1, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Shishikura, Makiko Ogiu