Abstract: A signal line, which branches into four more from a connecting line on the input side via a branch point and has the branch signal lines including ?/4 transmission lines at their parts, and FETs respectively connected in shunt with the branch signal lines between connecting points on the output terminal sides as viewed from the ?/4 transmission lines provided in the branch signal lines and ground ends are provided on a semiconductor substrate. Connecting points of the FETs at the two branch signal lines are disposed with being spaced such a distance that isolation corresponding to the frequency of an RF signal reaches more than equal to 25 dB and less than or equal to 35 dB at the ends of these branch signal lines.

Abstract: A signal line, which branches into four more from a connecting line on the input side via a branch point and has the branch signal lines including ?/4 transmission lines at their parts, and FETs respectively connected in shunt with the branch signal lines between connecting points on the output terminal sides as viewed from the ?/4 transmission lines provided in the branch signal lines and ground ends are provided on a semiconductor substrate. Connecting points of the FETs at the two branch signal lines are disposed with being spaced such a distance that isolation corresponding to the frequency of an RF signal reaches more than equal to 25 dB and less than or equal to 35 dB at the ends of these branch signal lines.

Abstract: A semiconductor device includes a high-power output transistor chip in which transistor cells are connected in parallel, each transistor cell including stripe-shaped gate electrodes connected to a gate bus, stripe-shaped drain electrodes connected to a drain pad, and stripe-shaped source electrodes connected to a source pad, wherein the drain electrodes and the source electrodes are alternatingly arranged and pairs of source and drain electrodes face each other across one of the gate electrodes; and a resistor including a portion of the gate bus between adjacent transistor cells, for preventing oscillation between the adjacent transistor cells. Since the resistor serves as a loss component, oscillation due to an imbalance in characteristics between adjacent transistor cells is cancelled so that the synthesis efficiency of the transistor cells is improved.

Abstract: A semiconductor device includes a semiconductor substrate on which are successively disposed, a semiconductor laminated layer structure including at least two semiconductor layers, a first semiconductor layer containing a first dopant impurity providing a first conductivity type, and a second semiconductor layer containing the first dopant impurity in a concentration higher than in the first semiconductor layer. A semiconductor diode includes a first electrode in ohmic contact with the second semiconductor layer, and a second electrode in Schottky contact with the second semiconductor layers. A transistor includes a gate electrode in the recess and making a Schottky contact with the first semiconductor layer, and a source electrode and a drain electrode disposed on opposite sides of the recess on the second semiconductor layer, and in ohmic contact with the second semiconductor layer.

Abstract: A semiconductor device includes a semiconductor substrate, first and second semiconductor layers of opposite conductivity types successively disposed on the semiconductor substrate, and a via hole structure including a hole penetrating through the first and second semiconductor layers and into the substrate, the via holes being defined by a side wall of the first and second layers and of the substrate, an electrically conducting material disposed on the side wall contacting the first and second semiconductor layers, and an electrically isolating region disposed in the first and second layers at the side wall and contacting the electrically conducting material. The electrically isolating region is formed with an ion flux applied either before or after etching of the via hole.

Abstract: A semiconductor device includes a semiconductor substrate, first and second semiconductor layers of opposite conductivity types successively disposed on the semiconductor substrate, and a via hole structure including a hole penetrating through the first and second semiconductor layers and into the substrate, the via holes being defined by a side wall of the first and second layers and of the substrate, an electrically conducting material disposed on the side wall contacting the first and second semiconductor layers, and an electrically isolating region disposed in the first and second layers at the side wall and contacting the electrically conducting material. The electrically isolating region is formed with an ion flux applied either before or after etching of the via hole.