Patents by Inventor Mako Kobayashi

Mako Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6768354
    Abstract: With power-on detection circuits provided for a plurality of power supply voltages, a main power-on detection signal is maintained at the active state to reset an internal node while at least one of the power-on detection signals is active. In a multi-power semiconductor integrated circuit device, current consumption at the time of power-up is reduced.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: July 27, 2004
    Assignees: Renesas Technology Corp., Mitsubishi Electric Engineering Company Limited
    Inventors: Akira Yamazaki, Fukashi Morishita, Yasuhiko Taito, Nobuyuki Fujii, Mihoko Akiyama, Mako Kobayashi
  • Patent number: 6700434
    Abstract: Oscillation outputs which are different for respective detector signals output from a first detector circuit and a second detector circuit, are obtained from a first ring oscillator and a second ring oscillator respectively corresponding to the detector circuits. A selector selects and outputs one of the oscillation outputs. Accordingly, it is sufficient to provide only one pump circuit in a circuit producing a substrate bias voltage.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: March 2, 2004
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Co., Ltd.
    Inventors: Nobuyuki Fujii, Fukashi Morishita, Mihoko Akiyama, Akira Yamazaki, Mako Kobayashi, Yasuhiko Taito
  • Patent number: 6515461
    Abstract: In a VDC circuit, a differential amplifier compares a first reference potential with an internal supply potential to generate a control signal according to a result of the comparison. A constant current source transistor receives at its gate a second reference potential supplied through a path different from that of the first reference potential to operate for controlling an operation current value of the differential amplifier. A drive transistor changes conductance between a node for outputting the internal supply potential and a supply potential according to the control signal.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: February 4, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company Limited
    Inventors: Mihoko Akiyama, Fukashi Morishita, Akira Yamazaki, Yasuhiko Taito, Mako Kobayashi, Nobuyuki Fujii
  • Patent number: 6515934
    Abstract: When a tuning mode signal VTUNE is activated, control clock signal TCLK is output, and counter counts up tuning signals TSIG1 to TSIG4. Tuning circuits render conductive the terminals of respective transistors, and reference potential Vref lowers in accordance with the reduction in the resistance value. When reference potential Vref attains equal to the external reference potential Ext.Vref, differential amplifier circuit stops output of the control clock signal TCLK. In accordance with the plurality of the determined tuning signals TSIG1 to TSIG4, fuse elements inside the tuning circuits are programmed.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: February 4, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mako Kobayashi, Fukashi Morishita
  • Patent number: 6472926
    Abstract: A plurality of pump modules are provided, the number of pump modules to be activated is changed depending on a mode of operation, and the number of pump modules to be activated is also adjusted with the specification of interest taken into consideration. There can be provided an internal voltage generation circuit occupying a small area and readily capable of accommodating a change in specification.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: October 29, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company Limited
    Inventors: Yasuhiko Taito, Akira Yamazaki, Fukashi Morishita, Mako Kobayashi, Mihoko Akiyama, Nobuyuki Fujii
  • Patent number: 6429729
    Abstract: A semiconductor integrated circuit device includes a reference voltage generating circuit that can be tuned without a circuit replacement when a process condition is varied. The reference voltage generating circuit is constituted such that two different circuit configurations having different temperature properties are switched by a first switch. In each of the circuit configurations, a switch control circuit in which tuning can be performed by switching a second switch generates a control signal based on a test mode and supplies the signal to the first switch for tuning. Thereafter, a fuse in the switch control circuit is blown off to generate a control signal, and reference voltage Vref is output.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: August 6, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company Limited
    Inventors: Mako Kobayashi, Fukashi Morishita, Mihoko Akiyama, Yasuhiko Taito, Akira Yamazaki, Nobuyuki Fujii
  • Patent number: 6424134
    Abstract: A semiconductor device includes a constant voltage generation circuit generating a constant voltage commonly to reference voltages corresponding to a plurality of internal voltages. The plurality of reference voltages are generated from the common constant voltage. Thus, the semiconductor device for generating internal voltages is implemented, which allows reduction in layout area and decrease in test time for voltage adjustment.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: July 23, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company Limited
    Inventors: Fukashi Morishita, Akira Yamazaki, Yasuhiko Taito, Nobuyuki Fujii, Mihoko Akiyama, Mako Kobayashi
  • Patent number: 6414881
    Abstract: In a control voltage generating section for supplying a control voltage to a gate of a charge transfer gate for transferring charges received from a capacitor to an output node to generate an internal voltage, the amplitude of the control voltage is switched in accordance with a switch signal. An internal voltage generating circuit making it possible to improve design efficiency, reliability and yield and reduce power consumption is provided.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: July 2, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company Limited
    Inventors: Nobuyuki Fujii, Fukashi Morishita, Akira Yamazaki, Yasuhiko Taito, Mihoko Akiyama, Mako Kobayashi
  • Publication number: 20020064077
    Abstract: When a tuning mode signal VTUNE is activated, control clock signal TCLK is output, and counter counts up tuning signals TSIG1 to TSIG4. Tuning circuits render conductive the terminals of respective transistors, and reference potential Vref lowers in accordance with the reduction in the resistance value. When reference potential Vref attains equal to the external reference potential Ext.Vref, differential amplifier circuit stops output of the control clock signal TCLK. In accordance with the plurality of the determined tuning signals TSIG1 to TSIG4, fuse elements inside the tuning circuits are programmed.
    Type: Application
    Filed: November 13, 2001
    Publication date: May 30, 2002
    Inventors: Mako Kobayashi, Fukashi Morishita
  • Patent number: 6392472
    Abstract: A voltage generation circuit includes a digital type VDC. The digital VDC includes a differential amplify circuit amplifying a voltage deviation of a reference voltage signal from a detection voltage signal to output the amplified voltage to a control node, a signal conversion circuit providing either an H level or an L level according to the voltage level of the control node, and an output transistor connecting an external power supply line and an internal power supply voltage node according to an output voltage of the signal conversion circuit. The center of the range of the varying voltage level of the control node is set by shifting to the logic threshold value of the signal conversion circuit.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: May 21, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mako Kobayashi, Fukashi Morishita
  • Publication number: 20020030537
    Abstract: A voltage generation circuit includes a digital type VDC. The digital VDC includes a differential amplify circuit amplifying a voltage deviation of a reference voltage signal from a detection voltage signal to output the amplified voltage to a control node, a signal conversion circuit providing either an H level or an L level according to the voltage level of the control node, and an output transistor connecting an external power supply line and an internal power supply voltage node according to an output voltage of the signal conversion circuit. The center of the range of the varying voltage level of the control node is set by shifting to the logic threshold value of the signal conversion circuit.
    Type: Application
    Filed: September 18, 2001
    Publication date: March 14, 2002
    Inventors: Mako Kobayashi, Fukashi Morishita
  • Publication number: 20020027809
    Abstract: In a control voltage generating section for supplying a control voltage to a gate of a charge transfer gate for transferring charges received from a capacitor to an output node to generate an internal voltage, the amplitude of the control voltage is switched in accordance with a switch signal. An internal voltage generating circuit making it possible to improve design efficiency, reliability and yield and reduce power consumption is provided.
    Type: Application
    Filed: June 8, 2001
    Publication date: March 7, 2002
    Inventors: Nobuyuki Fujii, Fukashi Morishita, Akira Yamazaki, Yasuhiko Taito, Mihoko Akiyama, Mako Kobayashi
  • Publication number: 20020017946
    Abstract: Oscillation outputs which are different between detector signals output in a first detector circuit and a second detector circuit are obtained from a first ring oscillator and a second ring oscillator respectively corresponding to the detector circuits, and a selector selects and outputs one of the oscillation outputs. Accordingly, it is sufficient to provide only one pump circuit.
    Type: Application
    Filed: June 14, 2001
    Publication date: February 14, 2002
    Inventors: Nobuyuki Fujii, Fukashi Morishita, Mihoko Akiyama, Akira Yamazaki, Mako Kobayashi, Yasuhiko Taito
  • Publication number: 20020011826
    Abstract: A semiconductor device includes a constant voltage generation circuit generating a constant voltage commonly to reference voltages corresponding to a plurality of internal voltages. The plurality of reference voltages are generated from the common constant voltage. Thus, the semiconductor device for generating internal voltages is implemented, which allows reduction in layout area and decrease in test time for voltage adjustment.
    Type: Application
    Filed: January 16, 2001
    Publication date: January 31, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha and Mitsubishi Electric Engineering Company Limited
    Inventors: Fukashi Morishita, Akira Yamazaki, Yasuhiko Taito, Nobuyuki Fujii, Mihoko Akiyama, Mako Kobayashi
  • Publication number: 20020011883
    Abstract: With power-on detection circuits provided for a plurality of power supply voltages, a main power-on detection signal is maintained at the active state to reset an internal node while at least one of the power-on detection signals is active. In a multi-power semiconductor integrated circuit device, current consumption at the time of power-up is reduced.
    Type: Application
    Filed: February 12, 2001
    Publication date: January 31, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA, and MITSUBISHI ELECTRIC ENGINEERING COMPANY LIMITED
    Inventors: Akira Yamazaki, Fukashi Morishita, Yasuhiko Taito, Nobuyuki Fujii, Mihoko Akiyama, Mako Kobayashi
  • Publication number: 20020008502
    Abstract: In a VDC circuit, a differential amplifier compares a first reference potential with an internal supply potential to generate a control signal according to a result of the comparison. A constant current source transistor receives at its gate a second reference potential supplied through a path different from that of the first reference potential to operate for controlling an operation current value of the differential amplifier. A drive transistor changes conductance between a node for outputting the internal supply potential and a supply potential according to the control signal.
    Type: Application
    Filed: January 19, 2001
    Publication date: January 24, 2002
    Applicant: Mitsubish Denki Kabushiki Kaisha and Mitsubish Electric Engineering Company Limited
    Inventors: Mihoko Akiyama, Fukashi Morishita, Akira Yamazaki, Yasuhiko Taito, Mako Kobayashi, Nobuyuki Fujii
  • Publication number: 20020008566
    Abstract: A plurality of pump modules are provided, the number of pump modules to be activated is changed depending on a mode of operation, and the number of pump modules to be activated is also adjusted with the specification of interest taken into consideration. There can be provided an internal voltage generation circuit occupying a small area and readily capable of accommodating a change in specification.
    Type: Application
    Filed: January 17, 2001
    Publication date: January 24, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha and Mitsubishi Electric Engineering Company Limited
    Inventors: Yasuhiko Taito, Akira Yamazaki, Fukashi Morishita, Mako Kobayashi, Mihoko Akiyama, Nobuyuki Fujii
  • Patent number: 6337506
    Abstract: A power supply circuit and an oscillation circuit or the like of noise generation sources are concentrated, and the periphery thereof is surrounded by a guard ring. Guard ring is provided to have bonding pads at least partially thereon. Guard ring is effectively provided utilizing the region below bonding pads, so that effective noise reduction is achieved while preventing increase in chip area.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: January 8, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fukashi Morishita, Teruhiko Amano, Kazutami Arimoto, Tetsushi Tanizaki, Takeshi Fujino, Takahiro Tsuruda, Mitsuya Kinoshita, Mako Kobayashi
  • Publication number: 20020000582
    Abstract: When a tuning mode signal VTUNE is activated, control clock signal TCLK is output, and counter counts up tuning signals TSIG1 to TSIG4. Tuning circuits render conductive the terminals of respective transistors, and reference potential Vref lowers in accordance with the reduction in the resistance value. When reference potential Vref attains equal to the external reference potential Ext.Vref, differential amplifier circuit stops output of the control clock signal TCLK. In accordance with the plurality of the determined tuning signals TSIG1 to TSIG4, fuse elements inside the tuning circuits are programmed.
    Type: Application
    Filed: January 21, 2000
    Publication date: January 3, 2002
    Inventors: Mako Kobayashi, Fukashi Morishita
  • Patent number: 6333669
    Abstract: The voltage converting circuit 10 includes a standby VDC, an active VDC which operates when the semiconductor integrated circuit device is activated and has current drivability larger than that of standby VDC, and a drivability control circuit. Drivability control circuit generates a control signal in accordance with operational frequency of the semiconductor integrated circuit device. Current drivability of the active the VDC is controlled in accordance with the operational frequency by the control signal.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: December 25, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mako Kobayashi, Fukashi Morishita