Patents by Inventor Makoto Arita

Makoto Arita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11448911
    Abstract: A method of setting a common electrode voltage of a liquid crystal display panel in a liquid crystal module is provided. The liquid crystal module includes the liquid crystal display panel including an alignment film, and a backlight disposed behind the liquid crystal display panel. The method of setting a common electrode voltage of a liquid crystal display panel includes: eliminating an electric charge of the alignment film by turning on the backlight without driving the liquid crystal display panel to emit light of the backlight onto the liquid crystal display panel; and setting the common electrode voltage of the liquid crystal display panel by adjusting the common electrode voltage, after the eliminating of the electric charge.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: September 20, 2022
    Assignees: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., PASONA KNOWLEDGE PARTNER INC.
    Inventors: Keisuke Izawa, Makoto Arita, Toshitaka Uchikoba
  • Patent number: 11448923
    Abstract: A liquid crystal display panel to be used in a vertical orientation includes: a first substrate; a second substrate located opposite to the first substrate; and a liquid crystal layer disposed between the first substrate and the second substrate. When a position of a top end of the liquid crystal layer is defined as a first position and a position of a bottom end of the liquid crystal layer is defined as a second position when the liquid crystal display panel is placed in the vertical orientation, a distance between the first substrate and the second substrate when the liquid crystal panel is in a horizontal orientation gradually decreases from the first position to the second position.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: September 20, 2022
    Assignees: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., PASONA KNOWLEDGE PARTNER INC.
    Inventors: Keisuke Izawa, Makoto Arita, Toshitaka Uchikoba
  • Publication number: 20220019102
    Abstract: A liquid crystal display panel to be used in a vertical orientation includes: a first substrate; a second substrate located opposite to the first substrate; and a liquid crystal layer disposed between the first substrate and the second substrate. When a position of a top end of the liquid crystal layer is defined as a first position and a position of a bottom end of the liquid crystal layer is defined as a second position when the liquid crystal display panel is placed in the vertical orientation, a distance between the first substrate and the second substrate when the liquid crystal panel is in a horizontal orientation gradually decreases from the first position to the second position.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 20, 2022
    Inventors: Keisuke IZAWA, Makoto ARITA, Toshitaka UCHIKOBA
  • Publication number: 20220019100
    Abstract: A method of setting a common electrode voltage of a liquid crystal display panel in a liquid crystal module is provided. The liquid crystal module includes the liquid crystal display panel including an alignment film, and a backlight disposed behind the liquid crystal display panel. The method of setting a common electrode voltage of a liquid crystal display panel includes: eliminating an electric charge of the alignment film by turning on the backlight without driving the liquid crystal display panel to emit light of the backlight onto the liquid crystal display panel; and setting the common electrode voltage of the liquid crystal display panel by adjusting the common electrode voltage, after the eliminating of the electric charge.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 20, 2022
    Inventors: Keisuke IZAWA, Makoto ARITA, Toshitaka UCHIKOBA
  • Patent number: 10210833
    Abstract: A display device includes a primary display area which comprises a first display area and a second display area which is unique from the first display area, a control unit configured to display an image in the primary display area, an image signal generating unit configured to generate display data based on externally input image data for a single image. The image signal generating unit comprises a memory which stores display-position information indicating a display location of a first image displayed in the primary display area. The display data comprises first and second display data to be displayed in the first display area and the second display area, respectively. The first display data is generated based on the externally input single image data and the display-position information. The control unit is configured to cause a first image to be displayed in the first display area based on the first display data.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: February 19, 2019
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Toshikazu Koudo, Katsuji Tanaka, Makoto Arita, Kazusa Miyaji, Ikuko Mori
  • Publication number: 20180286339
    Abstract: A display device includes a primary display area which comprises a first display area and a second display area which is unique from the first display area, a control unit configured to display an image in the primary display area, an image signal generating unit configured to generate display data based on externally input image data for a single image. The image signal generating unit comprises a memory which stores display-position information indicating a display location of a first image displayed in the primary display area. The display data comprises first and second display data to be displayed in the first display area and the second display area, respectively. The first display data is generated based on the externally input single image data and the display-position information. The control unit is configured to cause a first image to be displayed in the first display area based on the first display data.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Inventors: Toshikazu KOUDO, Katsuji TANAKA, Makoto ARITA, Kazusa MIYAJI, Ikuko MORI
  • Patent number: 9238634
    Abstract: The purpose is to provide a compound which can overcomes the disadvantages of conventional steroid drugs and NSAID. It is found that specific epoxy monohydroxy forms of eicosapentaenoic acid, docosahexaenoic acid and docosapentaenoic acid which are independently represented by formulae [chemical formula 1], [chemical formula 5] and the like have an inhibitory activity on neutrophils. This compound can inhibit the invasion of neutrophils into tissues and the activation of neutrophils which are observed in acute inflammations.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: January 19, 2016
    Assignee: THE UNIVERSITY OF TOKYO
    Inventors: Makoto Arita, Hiroyuki Arai, Yosuke Isobe, Tadafumi Kubota
  • Patent number: 8935461
    Abstract: A memory includes a storage element which stores the number of times of application of a rewrite voltage pulse into a memory array, and a required-time output unit which outputs data representing a required time for a rewrite operation based on the number of times of application stored in the storage element.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: January 13, 2015
    Assignee: Panasonic Corporation
    Inventors: Kazuyo Nishikawa, Shuuhei Noichi, Makoto Arita, Junichi Katou, Asako Miyoshi
  • Patent number: 8853437
    Abstract: An object of the present invention is to provide a compound having a novel structure for overcoming the defects of conventional steroid agents and NSAIDs. It is found that the particular dihydroxy bodies of eicosapentaenoic acid and docosahexaenoic acid, which have not conventionally been known (11,18-dihydroxy eicosapentaenoic acid (11,18-diHEPE), 17,18-dihydroxy eicosapentaenoic acid (17,18-diHEPE) etc.), have activity of inhibiting neutrophil, thereby solving the object. The present invention unexpectedly remarkably inhibits infiltration into a tissue of, and activation of neutrophil found out at acute inflammation. The compound of the present invention is a compound which has not conventionally been known. Therefore, utility as a new therapeutic is provided.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: October 7, 2014
    Assignee: The University of Tokyo
    Inventors: Makoto Arita, Hiroyuki Arai, Yousuke Isobe, Ryo Taguchi
  • Publication number: 20130274327
    Abstract: The purpose is to provide a compound which can overcomes the disadvantages of conventional steroid drugs and NSAID. It is found that specific epoxy monohydroxy forms of eicosapentaenoic acid, docosahexaenoic acid and docosapentaenoic acid which are independently represented by formulae [chemical formula 1], [chemical formula 5] and the like have an inhibitory activity on neutrophils. This compound can inhibit the invasion of neutrophils into tissues and the activation of neutrophils which are observed in acute inflammations.
    Type: Application
    Filed: August 4, 2011
    Publication date: October 17, 2013
    Inventors: Makoto Arita, Hiroyuki Arai, Yosuke Isobe, Tadafumi Kubota
  • Publication number: 20120059061
    Abstract: An object of the present invention is to provide a compound having a novel structure for overcoming the defects of conventional steroid agents and NSAIDs. It is found that the particular dihydroxy bodies of eicosapentaenoic acid and docosahexaenoic acid, which have not conventionally been known (11,18-dihydroxy eicosapentaenoic acid (11,18-diHEPE), 17,18-dihydroxy eicosapentaenoic acid (17,18-diHEPE) etc.), have activity of inhibiting neutrophil, thereby solving the object. The present invention unexpectedly remarkably inhibits infiltration into a tissue of, and activation of neutrophil found out at acute inflammation. The compound of the present invention is a compound which has not conventionally been known. Therefore, utility as a new therapeutic is provided.
    Type: Application
    Filed: February 19, 2010
    Publication date: March 8, 2012
    Applicant: The University of Tokyo
    Inventors: Makoto Arita, Hiroyuki Arai, Yousuke Isobe, Ryo Taguchi
  • Patent number: 8072808
    Abstract: A memory cell array including at least one memory cell, an address storage section containing address information, an address judging circuit for judging whether an input address matches the address information in the address storage section and outputting a result of the judgment, and a write or erase voltage generation circuit for generating a write or erase voltage to be applied to the memory cell are provided. The write or erase voltage generation circuit receives the output result from the address judging circuit and changes a write or erase voltage.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: December 6, 2011
    Assignee: Panasonic Corporation
    Inventor: Makoto Arita
  • Publication number: 20110152223
    Abstract: Disclosed is an agent for preventing/treating ANCA-related vasculitis and/or preventing the recurrence of ANCA-related vasculitis. Also disclosed is a therapeutic method using the agent. Specifically disclosed is a pharmaceutical composition comprising at least one member selected from the group consisting of eicosapentaenoic acid, a pharmaceutically acceptable salt thereof and an ester thereof as an active ingredient. The pharmaceutical composition is useful for the prevention of recurrence of ANCA-related vasculitis, the treatment of chronic ANCA-related vasculitis, and the prevention and treatment of rapidly progressive glomerulonephritis (RPGN).
    Type: Application
    Filed: August 21, 2009
    Publication date: June 23, 2011
    Inventors: Junichi Hirahashi, Makoto Arita, Keiichi Hishikawa, Toshiro Fujita, Masanori Nakakuki
  • Patent number: 7803557
    Abstract: The present invention is directed to methods for the identification and uses of a receptors that interact with anti-inflammatory compounds derived from eicosapentaenoic acid (EPA). The receptors are of the G-protein coupled receptor (GPCR) family, and are useful to screen candidate substances for anti-inflammatory activity, especially substances that are analogs of EPA. Such analogs are termed “resolvins”; and are typically di- and tri-hydroxy EPA analogs. One analog herein denoted Resolvin E1 was identified in humans and prepared by total synthesis. In nanomolar range Resolvin E1 reduces dermal inflammation, peritonitis, dendritic cells (DCs) migration and IL-12 production. Also described herein is a receptor denoted Reso ER1 that interacts with Resolvin E1 to attenuate cytokine induced activation of inflammatory pathways mediated by transcription factor (NF)-kB. Treatment of DCs with small-interfering RNA specific for ResoE1 eliminated the ligand's ability to regulate IL-12.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: September 28, 2010
    Assignee: The Brigham and Women's Hospital, Inc.
    Inventors: Charles N. Serhan, Makoto Arita
  • Publication number: 20090180961
    Abstract: The present invention is directed to methods for the identification and uses of a receptors that interact with anti-inflammatory compounds derived from eicosapentaenoic acid (EPA). The receptors are of the G-protein coupled receptor (GPCR) family, and are useful to screen candidate substances for anti-inflammatory activity, especially substances that are analogs of EPA. Such analogs are termed “resolvins”; and are typically di- and tri-hydroxy EPA analogs. One analog herein denoted Resolvin E1 was identified in humans and prepared by total synthesis. In nanomolar range Resolvin E1 reduces dermal inflammation, peritonitis, dendritic cells (DCs) migration and IL-12 production. Also described herein is a receptor denoted Reso ER1 that interacts with Resolvin E1 to attenuate cytokine induced activation of inflammatory pathways mediated by transcription factor (NF)-kB. Treatment of DCs with small-interfering RNA specific for ResoE1 eliminated the ligand's ability to regulate IL-12.
    Type: Application
    Filed: March 10, 2008
    Publication date: July 16, 2009
    Inventors: Charles N. Serhan, Makoto Arita
  • Publication number: 20090080255
    Abstract: A memory cell array including at least one memory cell, an address storage section containing address information, an address judging circuit for judging whether an input address matches the address information in the address storage section and outputting a result of the judgment, and a write or erase voltage generation circuit for generating a write or erase voltage to be applied to the memory cell are provided. The write or erase voltage generation circuit receives the output result from the address judging circuit and changes a write or erase voltage.
    Type: Application
    Filed: May 28, 2008
    Publication date: March 26, 2009
    Inventor: Makoto Arita
  • Patent number: 7388780
    Abstract: A memory cell array for memorizing data with any of 0th through fourth threshold voltages and a flag memory unit for memorizing a flag data showing a chronological sequence relationship between writing operations in which data in first and second pages are respectively written are provided. A controller shifts a state of the memory cell from the 0th state to the 0th or first state in accordance with the data in the first page, and shifts the state of the memory cell to any of the 0th, first, second and third states in accordance with the data in the second page in a “forward” writing operation. The controller shifts the state of the memory cell from the 0th state to the 0th or third state in accordance with the data in the second page, and shifts the state of the memory cell to any of the 0th, first, third and fourth states in accordance with the data in the first page in a “reverse” writing operation. A flag data showing the “reverse” writing operation is then memorized in the flag memory unit.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: June 17, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Makoto Arita
  • Patent number: 7341840
    Abstract: The present invention is directed to methods for the identification and uses of receptors that interact with anti-inflammatory compounds derived from eicosapentaenoic acid (EPA). The receptors are of the G-protein coupled receptor (GPCR) family, and are useful to screen candidate substances for anti-inflammatory activity, especially substances that are analogs of EPA. Such analogs are termed “resolvins”; and are typically di- and tri-hydroxy EPA analogs. One analog herein denoted Resolvin E1 was identified in humans and prepared by total synthesis. In nanomolar range Resolvin E1 reduces dermal inflammation, peritonitis, dendritic cells (DCs) migration and IL-12 production. Also described herein is a receptor denoted Reso ER1 that interacts with Resolvin E1 to attenuate cytokine induced activation of inflammatory pathways mediated by transcription factor (NF)-kB. Treatment of DCs with small-interfering RNA specific for ResoE1 eliminated the ligand's ability to regulate IL-12.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: March 11, 2008
    Assignee: The Brigham and Women's Hospital, Inc.
    Inventors: Charles N. Serhan, Makoto Arita
  • Publication number: 20070118719
    Abstract: There is provided a method for controlling a semiconductor memory which includes a memory cell array including a plurality of multivalued memory cells where, in each of the memory cells, a first write operation allows storage of data in a first page address and a second write operation allows storage of data in a second page address, the method comprising an address conversion table processing step and an address scramble step. At the address conversion table processing step, an address conversion table for address conversion is generated by, in each of the plurality of multivalued memory cells, allocating addresses in which writing is to be performed to addresses such that data is written in a second page address after writing of data in a first page address. At the address scramble step, address conversion is performed on an input address according to the address conversion table.
    Type: Application
    Filed: November 13, 2006
    Publication date: May 24, 2007
    Inventors: Takao Ozeki, Makoto Arita, Kunisato Yamaoka, Shunichi Iwanari
  • Publication number: 20070011512
    Abstract: A memory cell array for memorizing data with any of 0th through fourth threshold voltages and a flag memory unit for memorizing a flag data showing a chronological sequence relationship between writing operations in which data in first and second pages are respectively written are provided. A controller shifts a state of the memory cell from the 0th state to the 0th or first state in accordance with the data in the first page, and shifts the state of the memory cell to any of the 0th, first, second and third states in accordance with the data in the second page in a “forward” writing operation. The controller shifts the state of the memory cell from the 0th state to the 0th or third state in accordance with the data in the second page, and shifts the state of the memory cell to any of the 0th, first, third and fourth states in accordance with the data in the first page in a “reverse” writing operation. A flag data showing the “reverse” writing operation is then memorized in the flag memory unit.
    Type: Application
    Filed: June 21, 2006
    Publication date: January 11, 2007
    Inventor: Makoto Arita