Patents by Inventor Makoto ASOU

Makoto ASOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor wafer
    Patent number: 9589902
    Abstract: A semiconductor wafer has formed thereon various types of semiconductor chips and enables different types of semiconductor chips having the same chip size to be easily distinguished. An excluded region is formed on an outer periphery of the semiconductor wafer, and a region inside the excluded region is divided into different types of regions by boundaries. Mark chips are respectively arranged in the vicinity of both ends of the boundaries.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: March 7, 2017
    Assignee: SII Semiconductor Corporation
    Inventors: Yasunobu Matsumoto, Masaki Suzuki, Makoto Asou, Hiroshi Morita
  • SEMICONDUCTOR WAFER
    Publication number: 20150279786
    Abstract: Provided is a semiconductor wafer on which various types of semiconductor chips are assigned, the semiconductor wafer enabling different types of semiconductor chips having the same chip size to be easily distinguished. An excluded region (7) is formed on an outer periphery of the semiconductor wafer, and a region inside the excluded region (7) is divided into different types of regions (A), (B), (C), and (D). The regions (A), (B), (C), and (D) are defined by boundaries (22), (23), and (24). Mark chips (1), (2), (3), and (4) are respectively arranged in the vicinity of the both ends of the boundaries (21), (22), (23), and (24).
    Type: Application
    Filed: March 30, 2015
    Publication date: October 1, 2015
    Inventors: Yasunobu MATSUMOTO, Masaki SUZUKI, Makoto ASOU, Hiroshi MORITA