Patents by Inventor Makoto Hatori

Makoto Hatori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8129784
    Abstract: The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n+-type source region of an LDMOSFET, and no such metal silicide film is formed on an n?-type offset drain region, an n-type offset drain region, and an n+-type drain region. A side wall spacer comprising a silicon film is formed via an insulating film on the side wall of the gate electrode over the drain side thereof, and a field plate electrode is formed by this side wall spacer. The field plate electrode does not extend above the gate electrode, and a metal silicide film is formed over the entire upper surface of the gate electrode in the silicide process.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: March 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Makoto Hatori, Yutaka Hoshino
  • Publication number: 20110254087
    Abstract: To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n? type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.
    Type: Application
    Filed: June 24, 2011
    Publication date: October 20, 2011
    Inventors: Tomoyuki MIYAKE, Masatoshi Morikawa, Yutaka Hoshino, Makoto Hatori
  • Patent number: 7994567
    Abstract: To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n? type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: August 9, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoyuki Miyake, Masatoshi Morikawa, Yutaka Hoshino, Makoto Hatori
  • Publication number: 20100258876
    Abstract: To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n? type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.
    Type: Application
    Filed: June 25, 2010
    Publication date: October 14, 2010
    Inventors: Tomoyuki Miyake, Masatoshi Morikawa, Yutaka Hoshino, Makoto Hatori
  • Patent number: 7791131
    Abstract: To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n? type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: September 7, 2010
    Assignee: Renesas Electronics Corp.
    Inventors: Tomoyuki Miyake, Masatoshi Morikawa, Yutaka Hoshino, Makoto Hatori
  • Publication number: 20090224318
    Abstract: The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n+-type source region of an LDMOSFET, and no such metal silicide film is formed on an n?-type offset drain region, an n-type offset drain region, and an n+-type drain region. A side wall spacer comprising a silicon film is formed via an insulating film on the side wall of the gate electrode over the drain side thereof, and a field plate electrode is formed by this side wall spacer. The field plate electrode does not extend above the gate electrode, and a metal silicide film is formed over the entire upper surface of the gate electrode in the silicide process.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 10, 2009
    Inventors: Makoto Hatori, Yutaka Hoshino
  • Patent number: 7510941
    Abstract: The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n+-type source region of an LDMOSFET, and no such metal silicide film is formed on an n?-type offset drain region, an n-type offset drain region, and an n+-type drain region. A side wall spacer comprising a silicon film is formed via an insulating film on the side wall of the gate electrode over the drain side thereof, and a field plate electrode is formed by this side wall spacer. The field plate electrode does not extend above the gate electrode, and a metal silicide film is formed over the entire upper surface of the gate electrode in the silicide process.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: March 31, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Makoto Hatori, Yutaka Hoshino
  • Publication number: 20080103203
    Abstract: The skin disinfectant, which is able to sterilize skin by the action of a surfactant without damaging skin health conditions, contains water, from which polyvalent cations are removed and to which a sodium ion is added, and a surfactant. The surfactant is, for example, a fatty acid salt. When the skin disinfectant is applied onto skin, fungi and bacteria adhered or parasitic onto skin is sterilized by the action of the surfactant. At this time, the surfactant is not likely to give an irritation to skin due to the action of the water, from which polyvalent cations are removed and to which a sodium ion is added, and thus the skin health conditions tend not to be damaged. Accordingly, the skin disinfectant is useful as a remedy for, for example, a ringworm infectious disease.
    Type: Application
    Filed: October 25, 2007
    Publication date: May 1, 2008
    Inventors: Yuji Yoshinari, Masaki Takai, Makoto Hatori, Yuki Okamoto
  • Publication number: 20080103079
    Abstract: The cleaning agent, which is less likely to retain a surfactant on an object to be cleaned and not to restrict applicable objects to be cleaned, contains water from which polyvalent cations are removed and to which a sodium ion is added, and a surfactant. An example of the surfactant is a fatty acid salt. When the cleaning agent is applied to an object to be cleaned, stain adhered on the object is removed from the object by action of the surfactant. The surfactant hardly remains on the object due to the action of the water from which polyvalent cations are removed and to which a sodium ion is added. Accordingly, the cleaning agent can effectively wash a wide variety of objects, such as kitchens, tableware, food, washstands, bathrooms, toilets, vehicles, clothes and body skin, without damaging texture and deteriorating quality.
    Type: Application
    Filed: October 24, 2007
    Publication date: May 1, 2008
    Inventors: Yuji Yoshinari, Masaki Takai, Makoto Hatori, Daisuke Yamamoto, Yuki Okamoto
  • Publication number: 20080058242
    Abstract: The cleaning fluid, which is easily mass-produced, low priced, and safe and is also free from chemical substances contains water from which polyvalent cations are removed and to which sodium ions are added. When the cleaning fluid is applied to an object to be cleaned, stain adhered onto the object can be removed by action of the water. The object washed with the cleaning fluid is free from remnant of chemical substances, as is often not the case when washed with a cleaning fluid using chemical-substances such as a surfactant, and is therefore safe. Furthermore, since water stain or scale hardly remains on the object washed, new stain is not easily attached. Accordingly, the cleaning fluid is particularly effective when it is used as a cleaning fluid for kitchen sinks, tableware, foods, washstands, bathrooms, toilets, vehicles and clothes.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 6, 2008
    Inventors: Yuji Yoshinari, Masaki Takai, Makoto Hatori, Daisuke Yamamoto
  • Publication number: 20080057139
    Abstract: The skin-care water, which is able to safely improve skin health conditions, such as dry skin, contains water from which polyvalent cations are removed and to which sodium ions are added, and may contain fragrant materials according to need. When the skin-care water is applied to skin, for example, by means of taking a bath, it improves moisture retention of skin, moisture content of skin, elasticity, texture density and the like without providing side effects, as is often not the case when a skin-care water containing chemical substances is used. Accordingly, the skin-care water is useful as a moisturizing agent for skin, and an improving agent for dry skin, itchy feeling, skin scale and atopic dermatitis.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 6, 2008
    Inventors: Yuji Yoshinari, Masaki Takai, Makoto Hatori
  • Publication number: 20070102757
    Abstract: To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n? type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.
    Type: Application
    Filed: December 27, 2006
    Publication date: May 10, 2007
    Inventors: Tomoyuki Miyake, Masatoshi Morikawa, Yutaka Hoshino, Makoto Hatori
  • Patent number: 7176520
    Abstract: To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n? type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: February 13, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Tomoyuki Miyake, Masatoshi Morikawa, Yutaka Hoshino, Makoto Hatori
  • Publication number: 20060057793
    Abstract: The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n+-type source region of an LDMOSFET, and no such metal silicide film is formed on an n?-type offset drain region, an n-type offset drain region, and an n+-type drain region. A side wall spacer comprising a silicon film is formed via an insulating film on the side wall of the gate electrode over the drain side thereof, and a field plate electrode is formed by this side wall spacer. The field plate electrode does not extend above the gate electrode, and a metal silicide film is formed over the entire upper surface of the gate electrode in the silicide process.
    Type: Application
    Filed: September 12, 2005
    Publication date: March 16, 2006
    Inventors: Makoto Hatori, Yutaka Hoshino
  • Publication number: 20050051814
    Abstract: To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n? type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.
    Type: Application
    Filed: July 30, 2004
    Publication date: March 10, 2005
    Inventors: Tomoyuki Miyake, Masatoshi Morikawa, Yutaka Hoshino, Makoto Hatori