Patents by Inventor Makoto Hiraoka

Makoto Hiraoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4791485
    Abstract: An inter-frame encoding/decoding equipment for television signals consists of inter-frame encoding equipment encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives an encoded signal sent from the inter-frame encoding device via a transmission line, which decodes by adding the output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit. The inter-frame decoding equipment is provided with a second operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit.
    Type: Grant
    Filed: December 19, 1986
    Date of Patent: December 13, 1988
    Assignees: Nippon Telegraph & Telephone Public Corporation, Fujitsu Limited, NEC Corporation
    Inventors: Hideo Kuroda, Naoki Mukawa, Makoto Hiraoka, Kiichi Matsuda, Mitsuo Nishiwaki, Shuzo Tsugane
  • Patent number: 4677480
    Abstract: Inter-frame encoding/decoding equipment for television signals includes inter-frame encoding equipment generating an encoded signal by encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives the encoded signal sent from the inter-frame encoding device via a transmission line. The decoding equipment decodes by adding its output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which calculates remainders obtained by dividing a predetermined value, into bit groups of the output or the input of the frame memory. The inter-frame decoding equipment is provided with a second operation circuit which calculates remainders obtained by dividing, the predetermined value, into the bit groups of the output or the input of its frame memory.
    Type: Grant
    Filed: June 14, 1984
    Date of Patent: June 30, 1987
    Assignees: Nippon Telegraph & Telephone Public Corp., Fujitsu Limited, NEC Corp.
    Inventors: Hideo Kuroda, Naoki Mukawa, Makoto Hiraoka, Kiichi Matsuda, Mitsuo Nishiwaki, Shuzo Tsugane
  • Patent number: 4542406
    Abstract: The horizontal sync signal contained in the video signal from a video apparatus sometimes undergoes phase jump, resulting in failure of multiplexing of audio and video signals based on the horizontal sync signal. A sync signal switching circuit is adapted to produce a modified sync signal by switching the sync signal to a local sync signal upon occurrence of the phase jump, thereby assuring the multiplexing of audio and video signals.
    Type: Grant
    Filed: December 7, 1982
    Date of Patent: September 17, 1985
    Assignees: Nippon Electric Co., Ltd., Nippon Telegraph & Telephone Public Corporation, Fujitsu Limited
    Inventors: Haruo Shimoyama, Toshio Ohshima, Shinobu Nomoto, Makoto Hiraoka, Toshio Hanabata