Patents by Inventor Makoto Homma

Makoto Homma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10504225
    Abstract: An image processing device includes: an acquisition unit that acquires a probability distribution of luminance of a pixel in a plurality of perspective images including the luminance of the pixel which is superposition of luminance components resulting from respective objects, based on an occurrence frequency of a perspective image in which the luminance of the pixel has respective values of a plurality of values; a distribution estimation unit that estimates a mixture distribution indicating the acquired probability distribution; a component estimation unit that estimates a component corresponding to a smallest expectation value distribution of which an expectation value is the smallest among a plurality of partial distributions that form the estimated mixture distribution, and forming at least a portion of the luminance of the pixel; a removal unit that removes the estimated component from the luminance of the pixel included in the perspective image.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: December 10, 2019
    Assignees: TOHOKU UNIVERSITY, HIROSAKI UNIVERSITY
    Inventors: Noriyasu Homma, Masao Sakai, Kei Ichiji, Naoki Shibusawa, Xiaoyong Zhang, Makoto Abe, Norihiro Sugita, Makoto Yoshizawa, Yoshihiro Takai
  • Patent number: 10379307
    Abstract: Provided is an optical-electrical composite cable in which, even if the entire optical-electrical composite cable having an optical fiber routed along flexible flat wiring boards is made thin, the optical fiber is not deformed or damaged by a large bending stress. A pair of the flexible flat wiring boards are disposed on a front surface side and a rear surface side of the optical fiber, and a covering member integrates the entirety thereof. Thus, even if the optical-electrical composite cable is made thin, the cable is not bent with a large curvature without deformation of the optical fiber.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: August 13, 2019
    Assignee: SMK Corporation
    Inventors: Tadahito Sasaki, Kohei Homma, Mitsuhiro Yoshida, Masayoshi Suzuki, Makoto Goto
  • Patent number: 8921157
    Abstract: Solder bumps are formed on a plurality of electrode parts of a printed substrate and a semiconductor chip is loaded on the printed substrate via the plurality of solder bumps. In this case, a thermoplastic film is prepared as an underfill that covers a surface of the printed substrate on which the solder bumps are formed. In the film, parts corresponding to the solder bumps are removed and a peripheral edge of a part on which the semiconductor chip will be loaded has a protruded form. After the printed substrate has been covered with the film, the film is bonded onto the board and the semiconductor chip is loaded on the printed substrate and carried into a reflow furnace. In the reflow furnace, heat and pressure are applied to fuse the solder bumps.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: December 30, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Noriaki Mukai, Masaru Mitsumoto, Makoto Homma
  • Patent number: 8739700
    Abstract: In a printing system in which a roll film is rolled out to be printed by a printer and the film is rolled up after printing and drying, there is a possibility that wrinkles of the film are generated when printing, and printed materials are scratched because the printed film is positioned near the printer. Both end side of a suction stage in the film delivery direction are formed in a circular arc shape, and auxiliary stages are provided near the end portions to suck and hold a film, the auxiliary stages are allowed to be moved lower than a surface of the suction stage in the state to closely attach the film to the suction stage while applying tension to the film, and the film is sucked and held on the suction stage in the state to be printed after position adjustment to a surface of a mask.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: June 3, 2014
    Assignee: Hitachi Ltd
    Inventors: Akio Igarashi, Makoto Homma, Naoaki Hashimoto, Tomoyuki Yahagi
  • Publication number: 20120244666
    Abstract: Solder bumps are formed on a plurality of electrode parts of a printed substrate and a semiconductor chip is loaded on the printed substrate via the plurality of solder bumps. In this case, a thermoplastic film is prepared as an underfill that covers a surface of the printed substrate on which the solder bumps are formed. In the film, parts corresponding to the solder bumps are removed and a peripheral edge of a part on which the semiconductor chip will be loaded has a protruded form. After the printed substrate has been covered with the film, the film is bonded onto the board and the semiconductor chip is loaded on the printed substrate and carried into a reflow furnace. In the reflow furnace, heat and pressure are applied to fuse the solder bumps.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 27, 2012
    Inventors: Noriaki MUKAI, Masaru Mitsumoto, Makoto Homma
  • Publication number: 20110192295
    Abstract: In a printing system in which a roll film is rolled out to be printed by a printer and the film is rolled up after printing and drying, there is a possibility that wrinkles of the film are generated when printing, and printed materials are scratched because the printed film is positioned near the printer. Both end sides of a suction stage in the film delivery direction are formed in a circular arc shape, and auxiliary stages are provided near the end portions to suck and hold a film, the auxiliary stages are allowed to be moved lower than a surface of the suction stage in the state to closely attach the film to the suction stage while applying tension to the film, and the film is sucked and held on the suction stage in the state to be printed after position adjustment to a surface of a mask.
    Type: Application
    Filed: February 2, 2011
    Publication date: August 11, 2011
    Inventors: Akio IGARASHI, Makoto HOMMA, Naoaki HASHIMOTO, Tomoyuki YAHAGI
  • Patent number: 6237484
    Abstract: A screen printing apparatus 199, 169 has a roll paper vibrating device which vibrates roll paper in contact with the lower surface of a screen mask in a direction perpendicular to a moving direction of the roll paper while the roll paper is being moved in contact with the lower surface of the screen mask. Thereby, the roll paper in contact with the lower surface of the screen mask is moved in a waveform-shape pattern. Therefore, the cumulative contact area of the roll paper on the lower surface of the mask is increased, and it is possible to efficiently remove residue, such as paste attached onto the lower surface of the screen mask of the printing apparatus and paste attached inside pattern openings of the screen mask, to maintain a good printing performance.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: May 29, 2001
    Assignee: Hitachi Techno Engineering Co., Ltd.
    Inventors: Makoto Homma, Mitsuhiko Sato, Isao Abe, Noriaki Mukai
  • Patent number: 5309011
    Abstract: To achieve higher packaging density and one wafer level for a full-sized wafer memory, or wafer-scale integration memory system, the wafers are vertically stacked with each other at a predetermined interval. A packaging technique is improved in such a way that a memory system layout can be precisely realized and a precise through hole can be formed. Moreover, other chips are fixed on the wafer so as to achieve furthermore the high packaging density.
    Type: Grant
    Filed: October 14, 1992
    Date of Patent: May 3, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Tazunoki, Hiromitsu Mishimagi, Makoto Homma, Toshiyuki Sakuta, Hisashi Nakamura, Keiji Sasaki, Minoru Enomoto, Toshihiko Satoh, Kunizo Sahara, Shigeo Kuroda, Kanji Otsuka, Masao Kawamura, Hinoko Kurosawa, Kazuya Ito
  • Patent number: 5191224
    Abstract: To achieve higher packaging density and one wafer level for a full-sized wafer memory, or wafer-scale integration memory system, the wafers are vertically stacked with each other at a predetermined interval. A packaging technique is improved in such a way that a memory system layout can be precisely realized and a precise through hole can be formed. Moreover, other chips are fixed on the wafer so as to achieve furthermore the high packaging density.
    Type: Grant
    Filed: December 13, 1990
    Date of Patent: March 2, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Tazunoki, Hiromitsu Mishimagi, Makoto Homma, Toshiyuki Sakuta, Hisashi Nakamura, Keiji Sasaki, Minoru Enomoto, Toshihiko Satoh, Kunizo Sahara, Shigeo Kuroda, Kanji Otsuka, Masao Kawamura, Hinoko Kurosawa, Kazuya Ito
  • Patent number: 5176078
    Abstract: A screen printing machine comprises a conveyor for conveying a substrate to a positioning station, an XY.theta. table on which the substrate is to be put, and a printing device for printing a pattern onto the substrate in a printing station. The XY.theta. table is movable in an XY.theta. plane in the positioning station and also movable along a Z-direction perpendicular to the XY.theta. plane. The machine further comprises a device for moving the printing device between the printing station and a waiting station, an image processing device and a driving device for the XY.theta. table. The image processing device recognizes a position of the substrate and calculates the respective amount of movement of the XY.theta. table in the XY.theta. plane necessary for making the predetermined relative positional relation between the printing device and the substrate. The driving device moves the XY.theta. table, based on the amounts of movement calculated by the image processing device.
    Type: Grant
    Filed: May 26, 1992
    Date of Patent: January 5, 1993
    Assignee: Hitachi Techno Engineering Co., Ltd.
    Inventors: Makoto Homma, Norio Beppu
  • Patent number: 4392747
    Abstract: A display device structure comprising a casing, a display panel placed in the casing, a transparent covering and vibrating plate member on the front side of the display panel and an actuator for the plate member. The covering and vibrating plate member is carried on the casing through an elastic member interposed between the peripheral portion of the plate member and the casing. By this arrangement the plate member is capable of effectively generating sound outward upon reception of vibrating force from the actuator.
    Type: Grant
    Filed: October 23, 1980
    Date of Patent: July 12, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Akio Kumada, Takahiko Ihochi, Makoto Homma, Masashi Tanaka
  • Patent number: 4362998
    Abstract: An FM detector is constructed of a phase shift network and an analog multiplier. The analog multiplier includes a differential amplifier circuit and a phase detector circuit. The differential amplifier circuit includes differential pair transistors which are driven by FM intermediate frequency signals. One of the differential pair transistors has another transistor connected thereto which is also driven by the FM intermediate frequency signal. A collector signal of either one of the differential pair transistors is applied to the phase detector circuit through the phase shift network, while a collector signal of the other transistor is directly applied to the phase detector circuit. An emitter of the one transistor and an emitter of the other transistor are connected through resistors, whereby the signal-to-noise ratio of the FM detector is improved.
    Type: Grant
    Filed: January 31, 1979
    Date of Patent: December 7, 1982
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Watanabe, Masanori Ienaka, Yasuo Kominami, Makoto Homma
  • Patent number: 4247949
    Abstract: An input signal is applied to a first limiting amplifier circuit, and an output of the first limiting amplifier circuit is applied to a second limiting amplifier circuit. An output of the second limiting amplifier circuit is applied to a third limiting amplifier circuit. The output signal of the first limiting amplifier circuit is applied to a first detector circuit, the output signal of the second limiting amplifier circuit is applied to a second detector circuit, and the output signal of the third limiting amplifier circuit is applied to a third detector circuit. Bias means for stipulating the bias states of the first, second and third detector circuits are coupled to the third detector circuit. An output signal of the third detector circuit is applied to the second detector circuit as a bias signal, and an output signal of the second detector circuit is applied to the first detector circuit as a bias signal.
    Type: Grant
    Filed: February 6, 1979
    Date of Patent: January 27, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Watanabe, Masanori Ienaka, Yasuo Kominami, Makoto Homma
  • Patent number: 4236117
    Abstract: An FM detector is constructed of a phase shift network and an analog multiplier. The analog multiplier includes a differential amplifier circuit and a phase detector circuit. The differential amplifier circuit includes differential pair transistors which are driven by FM intermediate frequency signals. A base emitter junction of a diode-connected transistor is connected across a base and an emitter of one of the differential pair transistors. The base of the one transistor and a base of the diode-connected transistor are connected to an emitter of an emitter-follower transistor, and the FM intermediate frequency signal is applied to a base of the emitter-follower transistor. Noise which develops in the base of the differential pair transistor or the base of the diode-connected transistor is reduced by the low output impedance of the emitter-follower transistor, so that the signal-to-noise ratio of the FM detector is improved.
    Type: Grant
    Filed: February 2, 1979
    Date of Patent: November 25, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Watanabe, Masanori Ienaka, Yasuo Kominami, Makoto Homma
  • Patent number: 4041518
    Abstract: A metal-insulator semiconductor (MIS) device is manufactured by initially forming, on a semiconductor substrate, an insulating film having a hole therethrough and depositing silicon on the substrate to form a first monocrystalline silicon film in the hole and a polycrystalline silicon film on the insulating film. Then, a further insulating film is formed on the first silicon film, and a second silicon film is formed on the further insulating film. The second silicon film and the further insulating film are removed, so that the monocrystalline and polycrystalline parts of the first silicon film are exposed at both sides of the remaining part of the second silicon film and the further insulating film. Finally, an impurity is diffused to form a source and a drain region in the monocrystalline silicon film and conductive layers of polycrystalline silicon are disposed contiguous to the source and drain regions.
    Type: Grant
    Filed: April 14, 1976
    Date of Patent: August 9, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Shinji Shimizu, Seiichi Iwamatsu, Makoto Homma
  • Patent number: D686276
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: July 16, 2013
    Assignee: Hitachi Plant Technologies, Ltd.
    Inventors: Hirokuni Kurihara, Takao Kawano, Tomoyuki Yahagi, Makoto Homma